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authorStanislav Samsonov <samsonov@marvell.com>2008-06-22 22:45:10 +0200
committerLennert Buytenhek <buytenh@marvell.com>2008-06-22 22:45:10 +0200
commit794d15b25df5dda10efba600d6dd6cd74a7aa9cb (patch)
tree10797e90295895994ea3f2363e84e555e40abb97 /include/asm-arm/arch-mv78xx0/system.h
parenta9311cfed241ebcd6b5f9be5c8c6d519bf22f9e7 (diff)
[ARM] add Marvell 78xx0 ARM SoC support
The Marvell Discovery Duo (MV78xx0) is a family of ARM SoCs featuring (depending on the model) one or two Feroceon CPU cores with 512K of L2 cache and VFP coprocessors running at (depending on the model) between 800 MHz and 1.2 GHz, and features a DDR2 controller, two PCIe interfaces that can each run either in x4 or quad x1 mode, three USB 2.0 interfaces, two 3Gb/s SATA II interfaces, a SPI interface, two TWSI interfaces, a crypto accelerator, IDMA/XOR engines, a SPI interface, four UARTs, and depending on the model, two or four gigabit ethernet interfaces. This patch adds basic support for the platform, and allows booting on the MV78x00 development board, with functional UARTs, SATA, PCIe, GigE and USB ports. Signed-off-by: Stanislav Samsonov <samsonov@marvell.com> Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Diffstat (limited to 'include/asm-arm/arch-mv78xx0/system.h')
-rw-r--r--include/asm-arm/arch-mv78xx0/system.h37
1 files changed, 37 insertions, 0 deletions
diff --git a/include/asm-arm/arch-mv78xx0/system.h b/include/asm-arm/arch-mv78xx0/system.h
new file mode 100644
index 00000000000..7eb47d376db
--- /dev/null
+++ b/include/asm-arm/arch-mv78xx0/system.h
@@ -0,0 +1,37 @@
+/*
+ * include/asm-arm/arch-mv78xx0/system.h
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#ifndef __ASM_ARCH_SYSTEM_H
+#define __ASM_ARCH_SYSTEM_H
+
+#include <asm/arch/hardware.h>
+#include <asm/arch/mv78xx0.h>
+
+static inline void arch_idle(void)
+{
+ cpu_do_idle();
+}
+
+static inline void arch_reset(char mode)
+{
+ /*
+ * Enable soft reset to assert RSTOUTn.
+ */
+ writel(SOFT_RESET_OUT_EN, RSTOUTn_MASK);
+
+ /*
+ * Assert soft reset.
+ */
+ writel(SOFT_RESET, SYSTEM_SOFT_RESET);
+
+ while (1)
+ ;
+}
+
+
+#endif