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authorLinus Torvalds <torvalds@g5.osdl.org>2006-06-20 14:49:00 -0700
committerLinus Torvalds <torvalds@g5.osdl.org>2006-06-20 14:49:00 -0700
commitff9144530e9cfe8923e00172e3f8ff83c3b8ff8b (patch)
treec64a9528dde590b9f3174125ad361f46ee30bba8 /include/asm-arm/arch-s3c2410/regs-clock.h
parent25f42b6af09e34c3f92107b36b5aa6edc2fdba2f (diff)
parent96ce2385dd2817da549910001a69ac0a2762a1b9 (diff)
Merge master.kernel.org:/home/rmk/linux-2.6-arm
* master.kernel.org:/home/rmk/linux-2.6-arm: (22 commits) [ARM] 3559/1: S3C2442: core and serial port [ARM] 3557/1: S3C24XX: centralise and cleanup uart registration [ARM] 3558/1: SMDK24XX: LED platform devices [ARM] 3534/1: add spi support to lubbock platform [ARM] 3554/1: ARM: Fix dyntick locking [ARM] 3553/1: S3C24XX: earlier print of cpu idcode info [ARM] 3552/1: S3C24XX: Move VA of GPIO for low-level debug [ARM] 3551/1: S3C24XX: PM code failes to compile with CONFIG_DCACHE_WRITETHROUGH [ARM] 3550/1: OSIRIS: fix serial port map for 1:1 [ARM] 3548/1: Fix the ARMv6 CPU id in compressed/head.S [ARM] 3335/1: Old-abi Thumb sys_syscall broken [ARM] 3467/1: [3/3] Support for Philips PNX4008 platform: defconfig [ARM] 3466/1: [2/3] Support for Philips PNX4008 platform: chip support [ARM] 3465/1: [1/3] Support for Philips PNX4008 platform: headers [ARM] 3407/1: lpd7x: documetation update [ARM] 3406/1: lpd7x: compilation fix for smc91x [ARM] 3405/1: lpd7a40x: CPLD ssp driver [ARM] 3404/1: lpd7a40x: AMBA CLCD support [ARM] 3403/1: lpd7a40x: updated default configurations [ARM] 3402/1: lpd7a40x: serial driver bug fix ...
Diffstat (limited to 'include/asm-arm/arch-s3c2410/regs-clock.h')
-rw-r--r--include/asm-arm/arch-s3c2410/regs-clock.h6
1 files changed, 4 insertions, 2 deletions
diff --git a/include/asm-arm/arch-s3c2410/regs-clock.h b/include/asm-arm/arch-s3c2410/regs-clock.h
index 34360706e01..6c92faffe98 100644
--- a/include/asm-arm/arch-s3c2410/regs-clock.h
+++ b/include/asm-arm/arch-s3c2410/regs-clock.h
@@ -114,7 +114,7 @@ s3c2410_get_pll(unsigned int pllval, unsigned int baseclk)
#endif /* __ASSEMBLY__ */
-#ifdef CONFIG_CPU_S3C2440
+#if defined(CONFIG_CPU_S3C2440) || defined(CONFIG_CPU_S3C2442)
/* extra registers */
#define S3C2440_CAMDIVN S3C2410_CLKREG(0x18)
@@ -136,7 +136,9 @@ s3c2410_get_pll(unsigned int pllval, unsigned int baseclk)
#define S3C2440_CAMDIVN_HCLK4_HALF (1<<9)
#define S3C2440_CAMDIVN_DVSEN (1<<12)
-#endif /* CONFIG_CPU_S3C2440 */
+#define S3C2442_CAMDIVN_CAMCLK_DIV3 (1<<5)
+
+#endif /* CONFIG_CPU_S3C2440 or CONFIG_CPU_S3C2442 */
#endif /* __ASM_ARM_REGS_CLOCK */