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authorSteve French <sfrench@us.ibm.com>2006-03-31 03:35:56 +0000
committerSteve French <sfrench@us.ibm.com>2006-03-31 03:35:56 +0000
commitd62e54abca1146981fc9f98f85ff398a113a22c2 (patch)
tree870420dbc4c65e716dcef8a802aafdc0ef97a8b4 /include/asm-arm/assembler.h
parentfd4a0b92db6a57cba8d03efbe1cebf91f9124ce0 (diff)
parentce362c009250340358a7221f3cdb7954cbf19c01 (diff)
Merge with /pub/scm/linux/kernel/git/torvalds/linux-2.6.git
Signed-off-by: Steve French <sfrench@us.ibm.com>
Diffstat (limited to 'include/asm-arm/assembler.h')
-rw-r--r--include/asm-arm/assembler.h27
1 files changed, 22 insertions, 5 deletions
diff --git a/include/asm-arm/assembler.h b/include/asm-arm/assembler.h
index f31ac92b6c7..d53bafa9bf1 100644
--- a/include/asm-arm/assembler.h
+++ b/include/asm-arm/assembler.h
@@ -80,16 +80,33 @@
instr regs
/*
- * Save the current IRQ state and disable IRQs. Note that this macro
- * assumes FIQs are enabled, and that the processor is in SVC mode.
+ * Enable and disable interrupts
*/
- .macro save_and_disable_irqs, oldcpsr
- mrs \oldcpsr, cpsr
#if __LINUX_ARM_ARCH__ >= 6
+ .macro disable_irq
cpsid i
+ .endm
+
+ .macro enable_irq
+ cpsie i
+ .endm
#else
- msr cpsr_c, #PSR_I_BIT | MODE_SVC
+ .macro disable_irq
+ msr cpsr_c, #PSR_I_BIT | SVC_MODE
+ .endm
+
+ .macro enable_irq
+ msr cpsr_c, #SVC_MODE
+ .endm
#endif
+
+/*
+ * Save the current IRQ state and disable IRQs. Note that this macro
+ * assumes FIQs are enabled, and that the processor is in SVC mode.
+ */
+ .macro save_and_disable_irqs, oldcpsr
+ mrs \oldcpsr, cpsr
+ disable_irq
.endm
/*