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authorRussell King <rmk@dyn-67.arm.linux.org.uk>2007-02-20 10:52:01 +0000
committerRussell King <rmk+kernel@arm.linux.org.uk>2007-02-20 10:52:43 +0000
commite80a0e6e7ccdf64575d4384cb4172860422f5b81 (patch)
tree8960fa71eb73d0f1185e893192411cb873362738 /include/asm-arm/hardware
parent3b0eb4a195a124567cd0dd6f700f8388def542c6 (diff)
parent3668b45d46f777b0773ef5ff49531c1144efb6dd (diff)
[ARM] Merge remaining IOP code
Conflicts: include/asm-arm/arch-at91rm9200/entry-macro.S Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'include/asm-arm/hardware')
-rw-r--r--include/asm-arm/hardware/iop3xx.h72
1 files changed, 40 insertions, 32 deletions
diff --git a/include/asm-arm/hardware/iop3xx.h b/include/asm-arm/hardware/iop3xx.h
index c91b546e20e..15141a9caca 100644
--- a/include/asm-arm/hardware/iop3xx.h
+++ b/include/asm-arm/hardware/iop3xx.h
@@ -188,14 +188,10 @@ extern void gpio_line_set(int line, int value);
#define IOP3XX_TU_TRR1 (volatile u32 *)IOP3XX_TIMER_REG(0x0014)
#define IOP3XX_TU_TISR (volatile u32 *)IOP3XX_TIMER_REG(0x0018)
#define IOP3XX_TU_WDTCR (volatile u32 *)IOP3XX_TIMER_REG(0x001c)
-#define IOP3XX_TMR_TC 0x01
-#define IOP3XX_TMR_EN 0x02
-#define IOP3XX_TMR_RELOAD 0x04
-#define IOP3XX_TMR_PRIVILEGED 0x09
-#define IOP3XX_TMR_RATIO_1_1 0x00
-#define IOP3XX_TMR_RATIO_4_1 0x10
-#define IOP3XX_TMR_RATIO_8_1 0x20
-#define IOP3XX_TMR_RATIO_16_1 0x30
+#define IOP_TMR_EN 0x02
+#define IOP_TMR_RELOAD 0x04
+#define IOP_TMR_PRIVILEGED 0x08
+#define IOP_TMR_RATIO_1_1 0x00
/* Application accelerator unit */
#define IOP3XX_AAU_ACR (volatile u32 *)IOP3XX_REG_ADDR(0x0800)
@@ -276,40 +272,52 @@ extern void gpio_line_set(int line, int value);
#ifndef __ASSEMBLY__
void iop3xx_map_io(void);
-void iop3xx_init_time(unsigned long);
-unsigned long iop3xx_gettimeoffset(void);
void iop_init_cp6_handler(void);
+void iop_init_time(unsigned long tickrate);
+unsigned long iop_gettimeoffset(void);
-extern struct platform_device iop3xx_i2c0_device;
-extern struct platform_device iop3xx_i2c1_device;
+static inline void write_tmr0(u32 val)
+{
+ asm volatile("mcr p6, 0, %0, c0, c1, 0" : : "r" (val));
+}
+
+static inline void write_tmr1(u32 val)
+{
+ asm volatile("mcr p6, 0, %0, c1, c1, 0" : : "r" (val));
+}
+
+static inline u32 read_tcr0(void)
+{
+ u32 val;
+ asm volatile("mrc p6, 0, %0, c2, c1, 0" : "=r" (val));
+ return val;
+}
-extern inline void iop3xx_cp6_enable(void)
+static inline u32 read_tcr1(void)
{
- u32 temp;
+ u32 val;
+ asm volatile("mrc p6, 0, %0, c3, c1, 0" : "=r" (val));
+ return val;
+}
- asm volatile (
- "mrc p15, 0, %0, c15, c1, 0\n\t"
- "orr %0, %0, #(1 << 6)\n\t"
- "mcr p15, 0, %0, c15, c1, 0\n\t"
- "mrc p15, 0, %0, c15, c1, 0\n\t"
- "mov %0, %0\n\t"
- "sub pc, pc, #4\n\t"
- : "=r" (temp) );
+static inline void write_trr0(u32 val)
+{
+ asm volatile("mcr p6, 0, %0, c4, c1, 0" : : "r" (val));
}
-extern inline void iop3xx_cp6_disable(void)
+static inline void write_trr1(u32 val)
{
- u32 temp;
+ asm volatile("mcr p6, 0, %0, c5, c1, 0" : : "r" (val));
+}
- asm volatile (
- "mrc p15, 0, %0, c15, c1, 0\n\t"
- "bic %0, %0, #(1 << 6)\n\t"
- "mcr p15, 0, %0, c15, c1, 0\n\t"
- "mrc p15, 0, %0, c15, c1, 0\n\t"
- "mov %0, %0\n\t"
- "sub pc, pc, #4\n\t"
- : "=r" (temp) );
+static inline void write_tisr(u32 val)
+{
+ asm volatile("mcr p6, 0, %0, c6, c1, 0" : : "r" (val));
}
+
+extern struct platform_device iop3xx_i2c0_device;
+extern struct platform_device iop3xx_i2c1_device;
+
#endif