diff options
| author | Lennert Buytenhek <buytenh@wantstofly.org> | 2006-04-02 00:07:39 +0100 |
|---|---|---|
| committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2006-04-02 00:07:39 +0100 |
| commit | 23759dc6430428897a36c4d493f611eca55c9481 (patch) | |
| tree | c62050927599b36ed223753c35fd737e3c0c6762 /include/asm-arm/memory.h | |
| parent | d3f4c571b6e596f9d39c596426269006a309d3b8 (diff) | |
[ARM] 3439/2: xsc3: add I/O coherency support
Patch from Lennert Buytenhek
This patch adds support for the I/O coherent cache available on the
xsc3. The approach is to provide a simple API to determine whether the
chipset supports coherency by calling arch_is_coherent() and then
setting the appropriate system memory PTE and PMD bits. In addition,
we call this API on dma_alloc_coherent() and dma_map_single() calls.
A generic version exists that will compile out all the coherency-related
code that is not needed on the majority of ARM systems.
Note that we do not check for coherency in the dma_alloc_writecombine()
function as that still requires a special PTE setting. We also don't
touch dma_mmap_coherent() as that is a special ARM-only API that is by
definition only used on non-coherent system.
Signed-off-by: Deepak Saxena <dsaxena@plexity.net>
Signed-off-by: Lennert Buytenhek <buytenh@wantstofly.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'include/asm-arm/memory.h')
| -rw-r--r-- | include/asm-arm/memory.h | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/include/asm-arm/memory.h b/include/asm-arm/memory.h index afa5c3ea077..2b3cf69b3ed 100644 --- a/include/asm-arm/memory.h +++ b/include/asm-arm/memory.h @@ -234,6 +234,14 @@ static inline __deprecated void *bus_to_virt(unsigned long x) #define virt_to_dma(dev, addr) (__arch_virt_to_dma(dev, addr)) #endif +/* + * Optional coherency support. Currently used only by selected + * Intel XSC3-based systems. + */ +#ifndef arch_is_coherent +#define arch_is_coherent() 0 +#endif + #endif #include <asm-generic/memory_model.h> |