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| author | Dmitry Torokhov <dtor_core@ameritech.net> | 2006-03-13 23:36:52 -0500 |
|---|---|---|
| committer | Dmitry Torokhov <dtor_core@ameritech.net> | 2006-03-13 23:36:52 -0500 |
| commit | 58a343f22e8ef987b90e34bbef7f1455e3bb5a15 (patch) | |
| tree | fc811fb570639f2083df6d9191b6a8d7cff65352 /include/asm-arm/tlbflush.h | |
| parent | 51c38f9bce274a1e8a90aa457fb433be738f7458 (diff) | |
| parent | 3759fa9c55923f719ae944a3f8fbb029b36f759d (diff) | |
Merge rsync://rsync.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6
Diffstat (limited to 'include/asm-arm/tlbflush.h')
| -rw-r--r-- | include/asm-arm/tlbflush.h | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/include/asm-arm/tlbflush.h b/include/asm-arm/tlbflush.h index 9387a5e1ffe..0c2acc944a0 100644 --- a/include/asm-arm/tlbflush.h +++ b/include/asm-arm/tlbflush.h @@ -340,6 +340,12 @@ static inline void local_flush_tlb_kernel_page(unsigned long kaddr) asm("mcr%? p15, 0, %0, c8, c6, 1" : : "r" (kaddr)); if (tlb_flag(TLB_V6_I_PAGE)) asm("mcr%? p15, 0, %0, c8, c5, 1" : : "r" (kaddr)); + + /* The ARM ARM states that the completion of a TLB maintenance + * operation is only guaranteed by a DSB instruction + */ + if (tlb_flag(TLB_V6_U_PAGE | TLB_V6_D_PAGE | TLB_V6_I_PAGE)) + asm("mcr%? p15, 0, %0, c7, c10, 4" : : "r" (zero)); } /* |