[ARM] iop13xx: msi support

Enable devices to signal interrupts via PCI memory cycles.

rev6:
* fix enable/disable typo, Michael Ellerman

rev5:
* fix up ack, enable, and disable for iop13xx_msi_chip

rev4:
* move smp compile fix to separate patch
* use dynamic_irq_init in create_irq()
* hookup mask/unmask routines in iop13xx_msi_chip

rev3:
* change msi.c to use linux/smp.h instead of asm/smp.h
* call dynamic_irq_cleanup at destroy_irq time

rev2:
* destroy_irq did not take the full 128 bits of msi_irq_in_use into account
* added missing '&' for calls to test_and_set_bit and clear_bit

[ebiederm@xmission.com: review comments/suggestions]
[dan.j.williams@intel.com: cleanups/forward port to 2.6-git]
Signed-off-by: Daniel Wolstenholme <daniel.e.wolstenholme@intel.com>
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Acked-by: Eric W. Biederman <ebiederm@xmission.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

3 files changed, 47 insertions, 1 deletions

diff --git a/include/asm-arm/arch-iop13xx/iop13xx.h b/include/asm-arm/arch-iop13xx/iop13xx.h
index 85707e9c332..e6736c3d1f7 100644
--- a/include/asm-arm/arch-iop13xx/iop13xx.h
+++ b/include/asm-arm/arch-iop13xx/iop13xx.h
@@ -181,6 +181,7 @@ static inline int iop13xx_cpu_id(void)
 #define IOP13XX_ADMA1_PMMR_OFFSET  	0x00000200
 #define IOP13XX_ADMA2_PMMR_OFFSET  	0x00000400
 #define IOP13XX_PBI_PMMR_OFFSET    	0x00001580
+#define IOP13XX_MU_PMMR_OFFSET		0x00004000
 #define IOP13XX_ESSR0_PMMR_OFFSET  	0x00002188
 #define IOP13XX_ESSR0			IOP13XX_REG_ADDR32(0x00002188)
 
@@ -412,6 +413,34 @@ static inline int iop13xx_cpu_id(void)
 #define IOP13XX_ATU_OUMBAR_FUNC_NUM_MASK  	(0x7)
 /*=======================================================================*/
 
+/*============================MESSAGING UNIT=============================*/
+#define IOP13XX_MU_OFFSET(ofs)	IOP13XX_REG_ADDR32(IOP13XX_MU_PMMR_OFFSET +\
+							(ofs))
+
+#define IOP13XX_MU_IMR0	IOP13XX_MU_OFFSET(0x10)
+#define IOP13XX_MU_IMR1	IOP13XX_MU_OFFSET(0x14)
+#define IOP13XX_MU_OMR0	IOP13XX_MU_OFFSET(0x18)
+#define IOP13XX_MU_OMR1	IOP13XX_MU_OFFSET(0x1C)
+#define IOP13XX_MU_IDR	       	IOP13XX_MU_OFFSET(0x20)
+#define IOP13XX_MU_IISR	IOP13XX_MU_OFFSET(0x24)
+#define IOP13XX_MU_IIMR	IOP13XX_MU_OFFSET(0x28)
+#define IOP13XX_MU_ODR	       	IOP13XX_MU_OFFSET(0x2C)
+#define IOP13XX_MU_OISR	IOP13XX_MU_OFFSET(0x30)
+#define IOP13XX_MU_OIMR	IOP13XX_MU_OFFSET(0x34)
+#define IOP13XX_MU_IRCSR      	IOP13XX_MU_OFFSET(0x38)
+#define IOP13XX_MU_ORCSR      	IOP13XX_MU_OFFSET(0x3C)
+#define IOP13XX_MU_MIMR	IOP13XX_MU_OFFSET(0x48)
+#define IOP13XX_MU_MUCR	IOP13XX_MU_OFFSET(0x50)
+#define IOP13XX_MU_QBAR	IOP13XX_MU_OFFSET(0x54)
+#define IOP13XX_MU_MUBAR      	IOP13XX_MU_OFFSET(0x84)
+
+#define IOP13XX_MU_WINDOW_SIZE	(8 * 1024)
+#define IOP13XX_MU_BASE_PHYS	(0xff000000)
+#define IOP13XX_MU_BASE_PCI	(0xff000000)
+#define IOP13XX_MU_MIMR_PCI	(IOP13XX_MU_BASE_PCI + 0x48)
+#define IOP13XX_MU_MIMR_CORE_SELECT (15)
+/*=======================================================================*/
+
 /*==============================ADMA UNITS===============================*/
 #define IOP13XX_ADMA_PHYS_BASE(chan)	IOP13XX_REG_ADDR32_PHYS((chan << 9))
 #define IOP13XX_ADMA_UPPER_PA(chan)	(IOP13XX_ADMA_PHYS_BASE(chan) + 0xc0)
diff --git a/include/asm-arm/arch-iop13xx/irqs.h b/include/asm-arm/arch-iop13xx/irqs.h
index 5c6fac2a400..054e7acb5bf 100644
--- a/include/asm-arm/arch-iop13xx/irqs.h
+++ b/include/asm-arm/arch-iop13xx/irqs.h
@@ -168,7 +168,7 @@ static inline u32 read_intpnd_3(void)
 #define IRQ_IOP13XX_ATUE_IMD	(110) /* 14 */
 #define IRQ_IOP13XX_MU_MSI_TB	(111) /* 15 */
 #define IRQ_IOP13XX_RSVD_112	(112) /* 16 */
-#define IRQ_IOP13XX_RSVD_113	(113) /* 17 */
+#define IRQ_IOP13XX_INBD_MSI	(113) /* 17 */
 #define IRQ_IOP13XX_RSVD_114	(114) /* 18 */
 #define IRQ_IOP13XX_RSVD_115	(115) /* 19 */
 #define IRQ_IOP13XX_RSVD_116	(116) /* 20 */
@@ -184,7 +184,13 @@ static inline u32 read_intpnd_3(void)
 #define IRQ_IOP13XX_RSVD_126	(126) /* 30 */
 #define IRQ_IOP13XX_HPI	(127) /* 31 */
 
+#ifdef CONFIG_PCI_MSI
+#define IRQ_IOP13XX_MSI_0	(IRQ_IOP13XX_HPI + 1)
+#define NR_IOP13XX_IRQS 	(IRQ_IOP13XX_MSI_0 + 128)
+#else
 #define NR_IOP13XX_IRQS	(IRQ_IOP13XX_HPI + 1)
+#endif
+
 #define NR_IRQS		NR_IOP13XX_IRQS
 
 #endif /* _IOP13XX_IRQ_H_ */
diff --git a/include/asm-arm/arch-iop13xx/msi.h b/include/asm-arm/arch-iop13xx/msi.h
new file mode 100644
index 00000000000..b80c5ae17e9
--- /dev/null
+++ b/include/asm-arm/arch-iop13xx/msi.h
@@ -0,0 +1,11 @@
+#ifndef _IOP13XX_MSI_H_
+#define _IOP13XX_MSI_H_
+#ifdef CONFIG_PCI_MSI
+void iop13xx_msi_init(void);
+#else
+static inline void iop13xx_msi_init(void)
+{
+	return;
+}
+#endif
+#endif