diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2008-01-28 08:15:24 +1100 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2008-01-28 08:15:24 +1100 |
commit | 91525300baf162e83e923b09ca286f9205e21522 (patch) | |
tree | 115f50c0f270eb1bb032dc520e018d9aa65b957c /include/asm-blackfin/mach-bf561/anomaly.h | |
parent | 991dee591a99d035796a8c194eb1796cc020e142 (diff) | |
parent | 9c5e710bc1431f41ccdd0c294fa355aa0d45d2d7 (diff) |
Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cooloney/blackfin-2.6
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cooloney/blackfin-2.6: (54 commits)
MAINTIANERS: just use Mike gmail e-mail for contact and pawn the serial driver off onto Sonic
[Blackfin] arch: remove old I2C BF54x porting.
[Blackfin] arch: Add the semtimedop syscall. Upstream uClibc doesn't compile without it.
[Blackfin] arch: fix bug kernel boot message: memory information is not reasonable
[Blackfin] arch: use common flash driver to setup partitions rather than the bf5xx-flash driver
[Blackfin] arch: Fix bug - kernel build with Debug option enabled fails to boot up
[Blackfin] arch: Fix bug Only RTC interrupt can wake up deeper sleep core.
[Blackfin] arch: Add proper SW System Reset delay sequence
[Blackfin] arch: Update copyright date
[Blackfin] arch: GPIO API cleanup and anomaly update
[Blackfin] arch: Fix BUG gpio_direction_output API is not compatitable with GENERIC_GPIO API interface
[Blackfin] arch: Initial checkin of the memory protection support.
[Blackfin] arch: set_bfin_dma_config shouldnt set SYNC or RESTART by default - add argument or option
[Blackfin] arch: Add some comments - fix semicolons
[Blackfin] arch: move all code related to CPLB handling into a new subdirectory under kernel/
[Blackfin] arch: print out list of modules if kernel is crashing and tell people if the kernel is tainted
[Blackfin] arch: enable generic GPIO based I2C driver in STAMP-BF533, EZKIT-BF533 and EZKIT-BF561 boards
[Blackfin] arch: Don't oops_in_progress if single step is comming from the kernel
[Blackfin] arch: Fix BUG - kernel sometimes would stuck with KEYBOARD_GPIO on
[Blackfin] arch: update to latest anomaly sheets
...
Diffstat (limited to 'include/asm-blackfin/mach-bf561/anomaly.h')
-rw-r--r-- | include/asm-blackfin/mach-bf561/anomaly.h | 18 |
1 files changed, 16 insertions, 2 deletions
diff --git a/include/asm-blackfin/mach-bf561/anomaly.h b/include/asm-blackfin/mach-bf561/anomaly.h index bed95645688..0c1d4619393 100644 --- a/include/asm-blackfin/mach-bf561/anomaly.h +++ b/include/asm-blackfin/mach-bf561/anomaly.h @@ -7,7 +7,7 @@ */ /* This file shoule be up to date with: - * - Revision N, March 28, 2007; ADSP-BF561 Silicon Anomaly List + * - Revision O, 11/15/2007; ADSP-BF561 Blackfin Processor Anomaly List */ #ifndef _MACH_ANOMALY_H_ @@ -15,7 +15,7 @@ /* We do not support 0.1, 0.2, or 0.4 silicon - sorry */ #if __SILICON_REVISION__ < 3 || __SILICON_REVISION__ == 4 -# error Kernel will not work on BF561 silicon version 0.0, 0.1, 0.2, or 0.4 +# error will not work on BF561 silicon version 0.0, 0.1, 0.2, or 0.4 #endif /* Multi-Issue Instruction with dsp32shiftimm in slot1 and P-reg Store in slot 2 Not Supported */ @@ -208,6 +208,8 @@ #define ANOMALY_05000275 (__SILICON_REVISION__ > 2) /* Timing Requirements Change for External Frame Sync PPI Modes with Non-Zero PPI_DELAY */ #define ANOMALY_05000276 (__SILICON_REVISION__ < 5) +/* Writes to an I/O data register one SCLK cycle after an edge is detected may clear interrupt */ +#define ANOMALY_05000277 (__SILICON_REVISION__ < 3) /* Disabling Peripherals with DMA Running May Cause DMA System Instability */ #define ANOMALY_05000278 (__SILICON_REVISION__ < 5) /* False Hardware Error Exception When ISR Context Is Not Restored */ @@ -246,6 +248,18 @@ #define ANOMALY_05000332 (__SILICON_REVISION__ < 5) /* Flag Data Register Writes One SCLK Cycle After Edge Is Detected May Clear Interrupt Status */ #define ANOMALY_05000333 (__SILICON_REVISION__ < 5) +/* New Feature: Additional PPI Frame Sync Sampling Options (Not Available on Older Silicon) */ +#define ANOMALY_05000339 (__SILICON_REVISION__ < 5) +/* Memory DMA FIFO Causes Throughput Degradation on Writes to External Memory */ +#define ANOMALY_05000343 (__SILICON_REVISION__ < 5) +/* Serial Port (SPORT) Multichannel Transmit Failure when Channel 0 Is Disabled */ +#define ANOMALY_05000357 (1) +/* Conflicting Column Address Widths Causes SDRAM Errors */ +#define ANOMALY_05000362 (1) +/* PPI Underflow Error Goes Undetected in ITU-R 656 Mode */ +#define ANOMALY_05000366 (1) +/* Possible RETS Register Corruption when Subroutine Is under 5 Cycles in Duration */ +#define ANOMALY_05000371 (1) /* Anomalies that don't exist on this proc */ #define ANOMALY_05000158 (0) |