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| author | Linus Torvalds <torvalds@woody.linux-foundation.org> | 2007-07-28 19:33:04 -0700 |
|---|---|---|
| committer | Linus Torvalds <torvalds@woody.linux-foundation.org> | 2007-07-28 19:33:04 -0700 |
| commit | 7b5573769f26a23518b33a64ec129d2833564877 (patch) | |
| tree | 697674b1d2bf12541fc745baa8ef8d9e6faf8888 /include/asm-blackfin/mach-bf561/cdefBF561.h | |
| parent | 8e8ef2971b0fd6dcf1a66014fb74b41938eecb4e (diff) | |
| parent | 27b92bdbd589cf3f59244bf5e848e7be254a2e4c (diff) | |
Merge branch 'for-linus' of master.kernel.org:/pub/scm/linux/kernel/git/cooloney/blackfin-2.6
* 'for-linus' of master.kernel.org:/pub/scm/linux/kernel/git/cooloney/blackfin-2.6:
Input Serio: Blackfin doesnt support I8042 - make sure it doesnt get selected
Blackfin arch: add BF54x I2C/TWI TWI0 driver support
Blackfin On-Chip RTC driver update for supporting BF54x
Blackfin Ethernet MAC driver: fix bug Report returned -ENOMEM upwards (in case L1/uncached memory alloc fails)
Blackfin arch: add error message when IRQ no available
Blackfin arch: Initialize the exception vectors early in the boot process
Blackfin arch: fix a compiling warning about dma-mapping
Blackfin arch: switch to using proper defines this time THREAD_SIZE and PAGE_SIZE instead of just PAGE_SIZE everywhere
Blackfin arch: fix bug which unaligns the init thread's stack and causes the current macro to fail.
Blackfin arch: Load P0 before storing through it
Blackfin arch: fix KGDB bug, dont forget last parameter.
Blackfin arch: add selections for BF544 and BF542
Blackfin arch: use bfin_read_SWRST() now that BF561 provides it
Blackfin arch: setup aliases for some core Core A MMRs
Diffstat (limited to 'include/asm-blackfin/mach-bf561/cdefBF561.h')
| -rw-r--r-- | include/asm-blackfin/mach-bf561/cdefBF561.h | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/include/asm-blackfin/mach-bf561/cdefBF561.h b/include/asm-blackfin/mach-bf561/cdefBF561.h index 1a8ec9e4692..6e87ab269ff 100644 --- a/include/asm-blackfin/mach-bf561/cdefBF561.h +++ b/include/asm-blackfin/mach-bf561/cdefBF561.h @@ -81,6 +81,12 @@ static __inline__ void bfin_write_VR_CTL(unsigned int val) #define bfin_write_PLL_LOCKCNT(val) bfin_write16(PLL_LOCKCNT,val) #define bfin_read_CHIPID() bfin_read32(CHIPID) +/* For MMR's that are reserved on Core B, set up defines to better integrate with other ports */ +#define bfin_read_SWRST() bfin_read_SICA_SWRST() +#define bfin_write_SWRST() bfin_write_SICA_SWRST() +#define bfin_read_SYSCR() bfin_read_SICA_SYSCR() +#define bfin_write_SYSCR() bfin_write_SICA_SYSCR() + /* System Reset and Interrupt Controller registers for core A (0xFFC0 0100-0xFFC0 01FF) */ #define bfin_read_SICA_SWRST() bfin_read16(SICA_SWRST) #define bfin_write_SICA_SWRST(val) bfin_write16(SICA_SWRST,val) |