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authorMike Frysinger <michael.frysinger@analog.com>2007-07-25 11:19:14 +0800
committerBryan Wu <bryan.wu@analog.com>2007-07-25 11:19:14 +0800
commit1aafd9091226a02b481298315f959f777294684e (patch)
treeb09e0aaabb6aacd882499a69b28638cbd669dbba /include/asm-blackfin/mach-common/cdef_LPBlackfin.h
parent287050fe13bf34824f03b4351002b0e2db4ee5cb (diff)
Blackfin arch: revise anomaly handling by basing things on the compiler not the kconfig defines
revise anomaly handling by basing things on the compiler not the kconfig defines, so the header is stable and usable outside of the kernel. This also allows us to move some code from preprocessing to compiling (gcc culls dead code) which should help with code quality (readability, catch minor bugs, etc...). Signed-off-by: Mike Frysinger <michael.frysinger@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Diffstat (limited to 'include/asm-blackfin/mach-common/cdef_LPBlackfin.h')
-rw-r--r--include/asm-blackfin/mach-common/cdef_LPBlackfin.h4
1 files changed, 2 insertions, 2 deletions
diff --git a/include/asm-blackfin/mach-common/cdef_LPBlackfin.h b/include/asm-blackfin/mach-common/cdef_LPBlackfin.h
index 94ed381e560..ede210eca4e 100644
--- a/include/asm-blackfin/mach-common/cdef_LPBlackfin.h
+++ b/include/asm-blackfin/mach-common/cdef_LPBlackfin.h
@@ -39,7 +39,7 @@
#define bfin_read_SRAM_BASE_ADDRESS() bfin_read32(SRAM_BASE_ADDRESS)
#define bfin_write_SRAM_BASE_ADDRESS(val) bfin_write32(SRAM_BASE_ADDRESS,val)
#define bfin_read_DMEM_CONTROL() bfin_read32(DMEM_CONTROL)
-#ifdef ANOMALY_05000125
+#if ANOMALY_05000125
extern void bfin_write_DMEM_CONTROL(unsigned int val);
#else
#define bfin_write_DMEM_CONTROL(val) bfin_write32(DMEM_CONTROL,val)
@@ -129,7 +129,7 @@ extern void bfin_write_DMEM_CONTROL(unsigned int val);
#define DTEST_DATA3 0xFFE0040C
*/
#define bfin_read_IMEM_CONTROL() bfin_read32(IMEM_CONTROL)
-#ifdef ANOMALY_05000125
+#if ANOMALY_05000125
extern void bfin_write_IMEM_CONTROL(unsigned int val);
#else
#define bfin_write_IMEM_CONTROL(val) bfin_write32(IMEM_CONTROL,val)