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authorVenkatesh Pallipadi <venkatesh.pallipadi@intel.com>2006-01-11 22:44:21 +0100
committerLinus Torvalds <torvalds@g5.osdl.org>2006-01-11 19:04:54 -0800
commit6eb0a0fd059598ee0d49c6283ce25cccd743e9fc (patch)
treea608f92e3b8a94cba89e94786169897c64629580 /include/asm-i386/apic.h
parent5a07a30c3cc4dc438494d6416ffa74008a2194b3 (diff)
[PATCH] i386: Handle missing local APIC timer interrupts on C3 state
Whenever we see that a CPU is capable of C3 (during ACPI cstate init), we disable local APIC timer and switch to using a broadcast from external timer interrupt (IRQ 0). This is needed because Intel CPUs stop the local APIC timer in C3. This is currently only enabled for Intel CPUs. Patch below adds the code for i386 and also the ACPI hunk. Signed-off-by: Venkatesh Pallipadi <venkatesh.pallipadi@intel.com> Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'include/asm-i386/apic.h')
-rw-r--r--include/asm-i386/apic.h5
1 files changed, 5 insertions, 0 deletions
diff --git a/include/asm-i386/apic.h b/include/asm-i386/apic.h
index 8c454aa58ac..d30b8571573 100644
--- a/include/asm-i386/apic.h
+++ b/include/asm-i386/apic.h
@@ -132,6 +132,11 @@ extern unsigned int nmi_watchdog;
extern int disable_timer_pin_1;
+void smp_send_timer_broadcast_ipi(struct pt_regs *regs);
+void switch_APIC_timer_to_ipi(void *cpumask);
+void switch_ipi_to_APIC_timer(void *cpumask);
+#define ARCH_APICTIMER_STOPS_ON_C3 1
+
#else /* !CONFIG_X86_LOCAL_APIC */
static inline void lapic_shutdown(void) { }