diff options
| author | Ingo Molnar <mingo@elte.hu> | 2009-05-07 11:17:13 +0200 |
|---|---|---|
| committer | Ingo Molnar <mingo@elte.hu> | 2009-05-07 11:17:34 +0200 |
| commit | 44347d947f628060b92449702071bfe1d31dfb75 (patch) | |
| tree | c6ed74610d5b3295df4296659f80f5feb94b28cc /include/asm-m32r/cachectl.h | |
| parent | d94fc523f3c35bd8013f04827e94756cbc0212f4 (diff) | |
| parent | 413f81eba35d6ede9289b0c8a920c013a84fac71 (diff) | |
Merge branch 'linus' into tracing/core
Merge reason: tracing/core was on a .30-rc1 base and was missing out on
on a handful of tracing fixes present in .30-rc5-almost.
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'include/asm-m32r/cachectl.h')
| -rw-r--r-- | include/asm-m32r/cachectl.h | 26 |
1 files changed, 0 insertions, 26 deletions
diff --git a/include/asm-m32r/cachectl.h b/include/asm-m32r/cachectl.h deleted file mode 100644 index 2aab8f6fff4..00000000000 --- a/include/asm-m32r/cachectl.h +++ /dev/null @@ -1,26 +0,0 @@ -/* - * cachectl.h -- defines for M32R cache control system calls - * - * Copyright (C) 2003 by Kazuhiro Inaoka - */ -#ifndef __ASM_M32R_CACHECTL -#define __ASM_M32R_CACHECTL - -/* - * Options for cacheflush system call - * - * cacheflush() is currently fluch_cache_all(). - */ -#define ICACHE (1<<0) /* flush instruction cache */ -#define DCACHE (1<<1) /* writeback and flush data cache */ -#define BCACHE (ICACHE|DCACHE) /* flush both caches */ - -/* - * Caching modes for the cachectl(2) call - * - * cachectl(2) is currently not supported and returns ENOSYS. - */ -#define CACHEABLE 0 /* make pages cacheable */ -#define UNCACHEABLE 1 /* make pages uncacheable */ - -#endif /* __ASM_M32R_CACHECTL */ |