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authorLinus Torvalds <torvalds@linux-foundation.org>2008-07-20 21:14:00 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2008-07-20 21:14:00 -0700
commitd13ff0559fea73f237a01669887d2c10e11d7662 (patch)
tree427d40cc8b1a89cd4344a8aed539fa75f0cfa5da /include/asm-mips/mach-rc32434/cpu-feature-overrides.h
parentf076ab8d048f152b968bb1c6313fed88abb037fe (diff)
parentcb7f39d2bc5a20615d016dd86fca0fd233c13b5d (diff)
Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus
* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus: (21 commits) [MIPS] Remove unused maltasmp.h. [MIPS] Remove unused saa9730_uart.h. [MIPS] Rename MIPS sys_pipe syscall entry point to something MIPS-specific. [MIPS] 32-bit compat: Delete unused sys_truncate64 and sys_ftruncate64. [MIPS] TXx9: Fix some sparse warnings [MIPS] TXx9: Add 64-bit support [MIPS] TXx9: Cleanups for 64-bit support [MIPS] Cobalt: Fix I/O port resource range [MIPS] don't leak setup_early_printk() in userspace header [MIPS] Remove include/asm-mips/mips-boards/sead{,int}.h [MIPS] Remove asm-mips/mips-boards/atlas{,int}.h [MIPS] mips/sgi-ip22/ip28-berr.c: fix the build [MIPS] TXx9: Miscellaneous build fixes [MIPS] Routerboard 532: Support for base system [MIPS] IP32: Use common SGI button driver [MIPS] IP22: Use common SGI button driver [MIPS] IP22, IP28: Fix merge bug [MIPS] Tinker with constraints in <asm/atomic.h> to fix build error. [MIPS] Add missing prototypes to asm/page.h [MIPS] Fix missing prototypes in asm/fpu.h ...
Diffstat (limited to 'include/asm-mips/mach-rc32434/cpu-feature-overrides.h')
-rw-r--r--include/asm-mips/mach-rc32434/cpu-feature-overrides.h81
1 files changed, 81 insertions, 0 deletions
diff --git a/include/asm-mips/mach-rc32434/cpu-feature-overrides.h b/include/asm-mips/mach-rc32434/cpu-feature-overrides.h
new file mode 100644
index 00000000000..f3bc7efa260
--- /dev/null
+++ b/include/asm-mips/mach-rc32434/cpu-feature-overrides.h
@@ -0,0 +1,81 @@
+/*
+ * IDT RC32434 specific CPU feature overrides
+ *
+ * Copyright (C) 2008 Florian Fainelli <florian@openwrt.org>
+ *
+ * This file was derived from: include/asm-mips/cpu-features.h
+ * Copyright (C) 2003, 2004 Ralf Baechle
+ * Copyright (C) 2004 Maciej W. Rozycki
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the
+ * Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor,
+ * Boston, MA 02110-1301, USA.
+ */
+#ifndef __ASM_MACH_RC32434_CPU_FEATURE_OVERRIDES_H
+#define __ASM_MACH_RC32434_CPU_FEATURE_OVERRIDES_H
+
+/*
+ * The IDT RC32434 SOC has a built-in MIPS 4Kc core.
+ */
+#define cpu_has_tlb 1
+#define cpu_has_4kex 1
+#define cpu_has_3k_cache 0
+#define cpu_has_4k_cache 1
+#define cpu_has_tx39_cache 0
+#define cpu_has_sb1_cache 0
+#define cpu_has_fpu 0
+#define cpu_has_32fpr 0
+#define cpu_has_counter 1
+#define cpu_has_watch 1
+#define cpu_has_divec 1
+#define cpu_has_vce 0
+#define cpu_has_cache_cdex_p 0
+#define cpu_has_cache_cdex_s 0
+#define cpu_has_prefetch 1
+#define cpu_has_mcheck 1
+#define cpu_has_ejtag 1
+#define cpu_has_llsc 1
+
+#define cpu_has_mips16 0
+#define cpu_has_mdmx 0
+#define cpu_has_mips3d 0
+#define cpu_has_smartmips 0
+
+#define cpu_has_vtag_icache 0
+/* #define cpu_has_dc_aliases ? */
+/* #define cpu_has_ic_fills_f_dc ? */
+/* #define cpu_has_pindexed_dcache ? */
+
+/* #define cpu_icache_snoops_remote_store ? */
+
+#define cpu_has_mips32r1 1
+#define cpu_has_mips32r2 0
+#define cpu_has_mips64r1 0
+#define cpu_has_mips64r2 0
+
+#define cpu_has_dsp 0
+#define cpu_has_mipsmt 0
+
+/* #define cpu_has_nofpuex ? */
+#define cpu_has_64bits 0
+#define cpu_has_64bit_zero_reg 0
+#define cpu_has_64bit_gp_regs 0
+#define cpu_has_64bit_addresses 0
+
+#define cpu_has_inclusive_pcaches 0
+
+#define cpu_dcache_line_size() 16
+#define cpu_icache_line_size() 16
+
+#endif /* __ASM_MACH_RC32434_CPU_FEATURE_OVERRIDES_H */