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authorIngo Molnar <mingo@elte.hu>2008-07-21 15:06:09 +0200
committerIngo Molnar <mingo@elte.hu>2008-07-21 15:06:09 +0200
commite66d90fb4abd0a27ee96f57a32fb561221c4d6ae (patch)
tree3337cba94c7444b06fdb0e8b487287d07b71f4a0 /include/asm-mips/mach-rc32434/rb.h
parent55ca089e2579de90f048aca2a3030b8b2f864813 (diff)
parent14b395e35d1afdd8019d11b92e28041fad591b71 (diff)
Merge branch 'linus' into xen-64bit
Diffstat (limited to 'include/asm-mips/mach-rc32434/rb.h')
-rw-r--r--include/asm-mips/mach-rc32434/rb.h81
1 files changed, 81 insertions, 0 deletions
diff --git a/include/asm-mips/mach-rc32434/rb.h b/include/asm-mips/mach-rc32434/rb.h
new file mode 100644
index 00000000000..e0a76e3ffea
--- /dev/null
+++ b/include/asm-mips/mach-rc32434/rb.h
@@ -0,0 +1,81 @@
+/*
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Copyright (C) 2004 IDT Inc.
+ * Copyright (C) 2006 Felix Fietkau <nbd@openwrt.org>
+ */
+#ifndef __ASM_RC32434_RB_H
+#define __ASM_RC32434_RB_H
+
+#include <linux/genhd.h>
+
+#define IDT434_REG_BASE ((volatile void *) KSEG1ADDR(0x18000000))
+#define DEV0BASE 0x010000
+#define DEV0MASK 0x010004
+#define DEV0C 0x010008
+#define DEV0T 0x01000C
+#define DEV1BASE 0x010010
+#define DEV1MASK 0x010014
+#define DEV1C 0x010018
+#define DEV1TC 0x01001C
+#define DEV2BASE 0x010020
+#define DEV2MASK 0x010024
+#define DEV2C 0x010028
+#define DEV2TC 0x01002C
+#define DEV3BASE 0x010030
+#define DEV3MASK 0x010034
+#define DEV3C 0x010038
+#define DEV3TC 0x01003C
+#define BTCS 0x010040
+#define BTCOMPARE 0x010044
+#define GPIOBASE 0x050000
+#define GPIOCFG 0x050004
+#define GPIOD 0x050008
+#define GPIOILEVEL 0x05000C
+#define GPIOISTAT 0x050010
+#define GPIONMIEN 0x050014
+#define IMASK6 0x038038
+#define LO_WPX (1 << 0)
+#define LO_ALE (1 << 1)
+#define LO_CLE (1 << 2)
+#define LO_CEX (1 << 3)
+#define LO_FOFF (1 << 5)
+#define LO_SPICS (1 << 6)
+#define LO_ULED (1 << 7)
+
+#define BIT_TO_MASK(x) (1 << x)
+
+struct dev_reg {
+ u32 base;
+ u32 mask;
+ u32 ctl;
+ u32 timing;
+};
+
+struct korina_device {
+ char *name;
+ unsigned char mac[6];
+ struct net_device *dev;
+};
+
+struct cf_device {
+ int gpio_pin;
+ void *dev;
+ struct gendisk *gd;
+};
+
+struct mpmc_device {
+ unsigned char state;
+ spinlock_t lock;
+ void __iomem *base;
+};
+
+#endif /* __ASM_RC32434_RB_H */