diff options
| author | Len Brown <len.brown@intel.com> | 2005-12-06 17:31:30 -0500 |
|---|---|---|
| committer | Len Brown <len.brown@intel.com> | 2005-12-06 17:31:30 -0500 |
| commit | 3d5271f9883cba7b54762bc4fe027d4172f06db7 (patch) | |
| tree | ab8a881a14478598a0c8bda0d26c62cdccfffd6d /include/asm-mips/mips-boards/seadint.h | |
| parent | 378b2556f4e09fa6f87ff0cb5c4395ff28257d02 (diff) | |
| parent | 9115a6c787596e687df03010d97fccc5e0762506 (diff) | |
Pull release into acpica branch
Diffstat (limited to 'include/asm-mips/mips-boards/seadint.h')
| -rw-r--r-- | include/asm-mips/mips-boards/seadint.h | 11 |
1 files changed, 8 insertions, 3 deletions
diff --git a/include/asm-mips/mips-boards/seadint.h b/include/asm-mips/mips-boards/seadint.h index c3dcfcb928b..365c2a3c64f 100644 --- a/include/asm-mips/mips-boards/seadint.h +++ b/include/asm-mips/mips-boards/seadint.h @@ -20,9 +20,14 @@ #ifndef _MIPS_SEADINT_H #define _MIPS_SEADINT_H -#define SEADINT_UART0 2 -#define SEADINT_UART1 3 +/* + * Interrupts 0..7 are used for SEAD CPU interrupts + */ +#define MIPSCPU_INT_BASE 0 + +#define MIPSCPU_INT_UART0 2 +#define MIPSCPU_INT_UART1 3 -extern void seadint_init(void); +#define MIPSCPU_INT_CPUCTR 7 #endif /* !(_MIPS_SEADINT_H) */ |