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authorLinus Torvalds <torvalds@ppc970.osdl.org>2005-04-16 15:20:36 -0700
committerLinus Torvalds <torvalds@ppc970.osdl.org>2005-04-16 15:20:36 -0700
commit1da177e4c3f41524e886b7f1b8a0c1fc7321cac2 (patch)
tree0bba044c4ce775e45a88a51686b5d9f90697ea9d /include/asm-mips/processor.h
Linux-2.6.12-rc2v2.6.12-rc2
Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
Diffstat (limited to 'include/asm-mips/processor.h')
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diff --git a/include/asm-mips/processor.h b/include/asm-mips/processor.h
new file mode 100644
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+++ b/include/asm-mips/processor.h
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+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 1994 Waldorf GMBH
+ * Copyright (C) 1995, 1996, 1997, 1998, 1999, 2001, 2002, 2003 Ralf Baechle
+ * Copyright (C) 1996 Paul M. Antoine
+ * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
+ */
+#ifndef _ASM_PROCESSOR_H
+#define _ASM_PROCESSOR_H
+
+#include <linux/config.h>
+#include <linux/threads.h>
+
+#include <asm/cachectl.h>
+#include <asm/cpu.h>
+#include <asm/cpu-info.h>
+#include <asm/mipsregs.h>
+#include <asm/prefetch.h>
+#include <asm/system.h>
+
+/*
+ * Return current * instruction pointer ("program counter").
+ */
+#define current_text_addr() ({ __label__ _l; _l: &&_l;})
+
+/*
+ * System setup and hardware flags..
+ */
+extern void (*cpu_wait)(void);
+
+extern unsigned int vced_count, vcei_count;
+
+#ifdef CONFIG_MIPS32
+/*
+ * User space process size: 2GB. This is hardcoded into a few places,
+ * so don't change it unless you know what you are doing.
+ */
+#define TASK_SIZE 0x7fff8000UL
+
+/*
+ * This decides where the kernel will search for a free chunk of vm
+ * space during mmap's.
+ */
+#define TASK_UNMAPPED_BASE (PAGE_ALIGN(TASK_SIZE / 3))
+#endif
+
+#ifdef CONFIG_MIPS64
+/*
+ * User space process size: 1TB. This is hardcoded into a few places,
+ * so don't change it unless you know what you are doing. TASK_SIZE
+ * is limited to 1TB by the R4000 architecture; R10000 and better can
+ * support 16TB; the architectural reserve for future expansion is
+ * 8192EB ...
+ */
+#define TASK_SIZE32 0x7fff8000UL
+#define TASK_SIZE 0x10000000000UL
+
+/*
+ * This decides where the kernel will search for a free chunk of vm
+ * space during mmap's.
+ */
+#define TASK_UNMAPPED_BASE ((current->thread.mflags & MF_32BIT_ADDR) ? \
+ PAGE_ALIGN(TASK_SIZE32 / 3) : PAGE_ALIGN(TASK_SIZE / 3))
+#endif
+
+#define NUM_FPU_REGS 32
+
+typedef __u64 fpureg_t;
+
+struct mips_fpu_hard_struct {
+ fpureg_t fpr[NUM_FPU_REGS];
+ unsigned int fcr31;
+};
+
+/*
+ * It would be nice to add some more fields for emulator statistics, but there
+ * are a number of fixed offsets in offset.h and elsewhere that would have to
+ * be recalculated by hand. So the additional information will be private to
+ * the FPU emulator for now. See asm-mips/fpu_emulator.h.
+ */
+
+struct mips_fpu_soft_struct {
+ fpureg_t fpr[NUM_FPU_REGS];
+ unsigned int fcr31;
+};
+
+union mips_fpu_union {
+ struct mips_fpu_hard_struct hard;
+ struct mips_fpu_soft_struct soft;
+};
+
+#define INIT_FPU { \
+ {{0,},} \
+}
+
+typedef struct {
+ unsigned long seg;
+} mm_segment_t;
+
+#define ARCH_MIN_TASKALIGN 8
+
+/*
+ * If you change thread_struct remember to change the #defines below too!
+ */
+struct thread_struct {
+ /* Saved main processor registers. */
+ unsigned long reg16;
+ unsigned long reg17, reg18, reg19, reg20, reg21, reg22, reg23;
+ unsigned long reg29, reg30, reg31;
+
+ /* Saved cp0 stuff. */
+ unsigned long cp0_status;
+
+ /* Saved fpu/fpu emulator stuff. */
+ union mips_fpu_union fpu;
+
+ /* Other stuff associated with the thread. */
+ unsigned long cp0_badvaddr; /* Last user fault */
+ unsigned long cp0_baduaddr; /* Last kernel fault accessing USEG */
+ unsigned long error_code;
+ unsigned long trap_no;
+#define MF_FIXADE 1 /* Fix address errors in software */
+#define MF_LOGADE 2 /* Log address errors to syslog */
+#define MF_32BIT_REGS 4 /* also implies 16/32 fprs */
+#define MF_32BIT_ADDR 8 /* 32-bit address space (o32/n32) */
+ unsigned long mflags;
+ unsigned long irix_trampoline; /* Wheee... */
+ unsigned long irix_oldctx;
+};
+
+#define MF_ABI_MASK (MF_32BIT_REGS | MF_32BIT_ADDR)
+#define MF_O32 (MF_32BIT_REGS | MF_32BIT_ADDR)
+#define MF_N32 MF_32BIT_ADDR
+#define MF_N64 0
+
+#define INIT_THREAD { \
+ /* \
+ * saved main processor registers \
+ */ \
+ 0, 0, 0, 0, 0, 0, 0, 0, \
+ 0, 0, 0, \
+ /* \
+ * saved cp0 stuff \
+ */ \
+ 0, \
+ /* \
+ * saved fpu/fpu emulator stuff \
+ */ \
+ INIT_FPU, \
+ /* \
+ * Other stuff associated with the process \
+ */ \
+ 0, 0, 0, 0, \
+ /* \
+ * For now the default is to fix address errors \
+ */ \
+ MF_FIXADE, 0, 0 \
+}
+
+struct task_struct;
+
+/* Free all resources held by a thread. */
+#define release_thread(thread) do { } while(0)
+
+/* Prepare to copy thread state - unlazy all lazy status */
+#define prepare_to_copy(tsk) do { } while (0)
+
+extern long kernel_thread(int (*fn)(void *), void * arg, unsigned long flags);
+
+extern unsigned long thread_saved_pc(struct task_struct *tsk);
+
+/*
+ * Do necessary setup to start up a newly executed thread.
+ */
+extern void start_thread(struct pt_regs * regs, unsigned long pc, unsigned long sp);
+
+unsigned long get_wchan(struct task_struct *p);
+
+#define __PT_REG(reg) ((long)&((struct pt_regs *)0)->reg - sizeof(struct pt_regs))
+#define __KSTK_TOS(tsk) ((unsigned long)(tsk->thread_info) + THREAD_SIZE - 32)
+#define KSTK_EIP(tsk) (*(unsigned long *)(__KSTK_TOS(tsk) + __PT_REG(cp0_epc)))
+#define KSTK_ESP(tsk) (*(unsigned long *)(__KSTK_TOS(tsk) + __PT_REG(regs[29])))
+#define KSTK_STATUS(tsk) (*(unsigned long *)(__KSTK_TOS(tsk) + __PT_REG(cp0_status)))
+
+#define cpu_relax() barrier()
+
+/*
+ * Return_address is a replacement for __builtin_return_address(count)
+ * which on certain architectures cannot reasonably be implemented in GCC
+ * (MIPS, Alpha) or is unuseable with -fomit-frame-pointer (i386).
+ * Note that __builtin_return_address(x>=1) is forbidden because GCC
+ * aborts compilation on some CPUs. It's simply not possible to unwind
+ * some CPU's stackframes.
+ *
+ * __builtin_return_address works only for non-leaf functions. We avoid the
+ * overhead of a function call by forcing the compiler to save the return
+ * address register on the stack.
+ */
+#define return_address() ({__asm__ __volatile__("":::"$31");__builtin_return_address(0);})
+
+#ifdef CONFIG_CPU_HAS_PREFETCH
+
+#define ARCH_HAS_PREFETCH
+
+extern inline void prefetch(const void *addr)
+{
+ __asm__ __volatile__(
+ " .set mips4 \n"
+ " pref %0, (%1) \n"
+ " .set mips0 \n"
+ :
+ : "i" (Pref_Load), "r" (addr));
+}
+
+#endif
+
+#endif /* _ASM_PROCESSOR_H */