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authorPaul Mackerras <paulus@samba.org>2005-10-31 13:37:12 +1100
committerPaul Mackerras <paulus@samba.org>2005-10-31 13:37:12 +1100
commit23fd07750a789a66fe88cf173d52a18f1a387da4 (patch)
tree06fdd6df35fdb835abdaa9b754d62f6b84b97250 /include/asm-mips/sibyte/sb1250_mac.h
parentbd787d438a59266af3c9f6351644c85ef1dd21fe (diff)
parented28f96ac1960f30f818374d65be71d2fdf811b0 (diff)
Merge ../linux-2.6 by hand
Diffstat (limited to 'include/asm-mips/sibyte/sb1250_mac.h')
-rw-r--r--include/asm-mips/sibyte/sb1250_mac.h35
1 files changed, 24 insertions, 11 deletions
diff --git a/include/asm-mips/sibyte/sb1250_mac.h b/include/asm-mips/sibyte/sb1250_mac.h
index 18e74e43f4a..adfc688fa55 100644
--- a/include/asm-mips/sibyte/sb1250_mac.h
+++ b/include/asm-mips/sibyte/sb1250_mac.h
@@ -8,8 +8,6 @@
*
* SB1250 specification level: User's manual 1/02/02
*
- * Author: Mitch Lichtenberg
- *
*********************************************************************
*
* Copyright 2000,2001,2002,2003
@@ -81,7 +79,10 @@
#define M_MAC_RESERVED1 _SB_MAKEMASK(8,9)
#define M_MAC_AP_STAT_EN _SB_MAKEMASK1(17)
-#define M_MAC_RESERVED2 _SB_MAKEMASK1(18)
+
+#if SIBYTE_HDR_FEATURE_CHIP(1480)
+#define M_MAC_TIMESTAMP _SB_MAKEMASK1(18)
+#endif
#define M_MAC_DRP_ERRPKT_EN _SB_MAKEMASK1(19)
#define M_MAC_DRP_FCSERRPKT_EN _SB_MAKEMASK1(20)
#define M_MAC_DRP_CODEERRPKT_EN _SB_MAKEMASK1(21)
@@ -132,9 +133,9 @@
#define M_MAC_RX_CH_SEL_MSB _SB_MAKEMASK1(44)
#endif /* 1250 PASS2 || 112x PASS1 */
-#if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1)
+#if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1) || SIBYTE_HDR_FEATURE_CHIP(1480)
#define M_MAC_SPLIT_CH_SEL _SB_MAKEMASK1(45)
-#endif /* 1250 PASS3 || 112x PASS1 */
+#endif /* 1250 PASS3 || 112x PASS1 || 1480 */
#define S_MAC_BYPASS_IFG _SB_MAKE64(46)
#define M_MAC_BYPASS_IFG _SB_MAKEMASK(8,S_MAC_BYPASS_IFG)
@@ -176,10 +177,22 @@
#define M_MAC_PORT_RESET _SB_MAKEMASK1(8)
+#if (SIBYTE_HDR_FEATURE_CHIP(1250) || SIBYTE_HDR_FEATURE_CHIP(112x))
#define M_MAC_RX_ENABLE _SB_MAKEMASK1(10)
#define M_MAC_TX_ENABLE _SB_MAKEMASK1(11)
#define M_MAC_BYP_RX_ENABLE _SB_MAKEMASK1(12)
#define M_MAC_BYP_TX_ENABLE _SB_MAKEMASK1(13)
+#endif
+
+/*
+ * MAC reset information register (1280/1255)
+ */
+#if SIBYTE_HDR_FEATURE_CHIP(1480)
+#define M_MAC_RX_CH0_PAUSE_ON _SB_MAKEMASK1(8)
+#define M_MAC_RX_CH1_PAUSE_ON _SB_MAKEMASK1(16)
+#define M_MAC_TX_CH0_PAUSE_ON _SB_MAKEMASK1(24)
+#define M_MAC_TX_CH1_PAUSE_ON _SB_MAKEMASK1(32)
+#endif
/*
* MAC DMA Control Register
@@ -267,12 +280,12 @@
#define V_MAC_IFG_RX(x) _SB_MAKEVALUE(x,S_MAC_IFG_RX)
#define G_MAC_IFG_RX(x) _SB_GETVALUE(x,S_MAC_IFG_RX,M_MAC_IFG_RX)
-#if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1)
+#if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1) || SIBYTE_HDR_FEATURE_CHIP(1480)
#define S_MAC_PRE_LEN _SB_MAKE64(0)
#define M_MAC_PRE_LEN _SB_MAKEMASK(6,S_MAC_PRE_LEN)
#define V_MAC_PRE_LEN(x) _SB_MAKEVALUE(x,S_MAC_PRE_LEN)
#define G_MAC_PRE_LEN(x) _SB_GETVALUE(x,S_MAC_PRE_LEN,M_MAC_PRE_LEN)
-#endif /* 1250 PASS3 || 112x PASS1 */
+#endif /* 1250 PASS3 || 112x PASS1 || 1480 */
#define S_MAC_IFG_TX _SB_MAKE64(6)
#define M_MAC_IFG_TX _SB_MAKEMASK(6,S_MAC_IFG_TX)
@@ -458,9 +471,9 @@
#define V_MAC_COUNTER_ADDR(x) _SB_MAKEVALUE(x,S_MAC_COUNTER_ADDR)
#define G_MAC_COUNTER_ADDR(x) _SB_GETVALUE(x,S_MAC_COUNTER_ADDR,M_MAC_COUNTER_ADDR)
-#if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1)
+#if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1) || SIBYTE_HDR_FEATURE_CHIP(1480)
#define M_MAC_TX_PAUSE_ON _SB_MAKEMASK1(52)
-#endif /* 1250 PASS3 || 112x PASS1 */
+#endif /* 1250 PASS3 || 112x PASS1 || 1480 */
/*
* MAC Fifo Pointer Registers (Table 9-19) [Debug register]
@@ -594,7 +607,7 @@
#define V_MAC_IPHDR_OFFSET(x) _SB_MAKEVALUE(x,S_MAC_IPHDR_OFFSET)
#define G_MAC_IPHDR_OFFSET(x) _SB_GETVALUE(x,S_MAC_IPHDR_OFFSET,M_MAC_IPHDR_OFFSET)
-#if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1)
+#if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1) || SIBYTE_HDR_FEATURE_CHIP(1480)
#define S_MAC_RX_CRC_OFFSET _SB_MAKE64(16)
#define M_MAC_RX_CRC_OFFSET _SB_MAKEMASK(8,S_MAC_RX_CRC_OFFSET)
#define V_MAC_RX_CRC_OFFSET(x) _SB_MAKEVALUE(x,S_MAC_RX_CRC_OFFSET)
@@ -612,7 +625,7 @@
#define M_MAC_RX_CH_MSN_SEL _SB_MAKEMASK(8,S_MAC_RX_CH_MSN_SEL)
#define V_MAC_RX_CH_MSN_SEL(x) _SB_MAKEVALUE(x,S_MAC_RX_CH_MSN_SEL)
#define G_MAC_RX_CH_MSN_SEL(x) _SB_GETVALUE(x,S_MAC_RX_CH_MSN_SEL,M_MAC_RX_CH_MSN_SEL)
-#endif /* 1250 PASS3 || 112x PASS1 */
+#endif /* 1250 PASS3 || 112x PASS1 || 1480 */
/*
* MAC Receive Channel Select Registers (Table 9-25)