diff options
| author | Ralf Baechle <ralf@linux-mips.org> | 2006-03-11 08:18:41 +0000 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2006-03-21 13:27:47 +0000 |
| commit | a3dddd560ee936495466d85ecc97490d171e8d31 (patch) | |
| tree | e9b5d778b5249ce348d2285a9b886b83c510d813 /include/asm-mips/sn/sn0/hubio.h | |
| parent | 59b3e8e9aac69d2d02853acac7e2affdfbabca50 (diff) | |
[MIPS] War on whitespace: cleanup initial spaces followed by tabs.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'include/asm-mips/sn/sn0/hubio.h')
| -rw-r--r-- | include/asm-mips/sn/sn0/hubio.h | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/include/asm-mips/sn/sn0/hubio.h b/include/asm-mips/sn/sn0/hubio.h index 80cf6a52ed3..f314da21b97 100644 --- a/include/asm-mips/sn/sn0/hubio.h +++ b/include/asm-mips/sn/sn0/hubio.h @@ -229,7 +229,7 @@ typedef union hubii_ilcsr_u { icsr_llp_en: 1, /* LLP enable bit */ icsr_rsvd2: 1, /* reserver */ icsr_wrm_reset: 1, /* Warm reset bit */ - icsr_rsvd1: 2, /* Data ready offset */ + icsr_rsvd1: 2, /* Data ready offset */ icsr_null_to: 6; /* Null timeout */ } icsr_fields_s; @@ -274,9 +274,9 @@ typedef union io_perf_sel { u64 perf_sel_reg; struct { u64 perf_rsvd : 48, - perf_icct : 8, - perf_ippr1 : 4, - perf_ippr0 : 4; + perf_icct : 8, + perf_ippr1 : 4, + perf_ippr0 : 4; } perf_sel_bits; } io_perf_sel_t; @@ -287,8 +287,8 @@ typedef union io_perf_cnt { u64 perf_cnt; struct { u64 perf_rsvd1 : 32, - perf_rsvd2 : 12, - perf_cnt : 20; + perf_rsvd2 : 12, + perf_cnt : 20; } perf_cnt_bits; } io_perf_cnt_t; |