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authorRalf Baechle <ralf@linux-mips.org>2005-08-25 16:22:09 +0000
committerRalf Baechle <ralf@linux-mips.org>2005-10-29 19:32:11 +0100
commitf99d3023f317fb3916b46465cc07a0cad3faa0a5 (patch)
tree727715d292ec4752f71423922e0511e82e585090 /include/asm-mips/system.h
parente607d6c8b8dd684936fda4b2cc37ad9f9104bed4 (diff)
Sprinkle a few more .set mipsX over xchg to make sure we dont' end up with
64-bit instructions on 32-bit processors, they tend to be unhappy about that kind of food ;-) Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'include/asm-mips/system.h')
-rw-r--r--include/asm-mips/system.h4
1 files changed, 4 insertions, 0 deletions
diff --git a/include/asm-mips/system.h b/include/asm-mips/system.h
index b1ac3f5bfc3..b126545e96e 100644
--- a/include/asm-mips/system.h
+++ b/include/asm-mips/system.h
@@ -302,7 +302,9 @@ static inline unsigned long __cmpxchg_u32(volatile int * m, unsigned long old,
" .set mips3 \n"
"1: ll %0, %2 # __cmpxchg_u32 \n"
" bne %0, %z3, 2f \n"
+ " .set mips0 \n"
" move $1, %z4 \n"
+ " .set mips3 \n"
" sc $1, %1 \n"
" beqzl $1, 1b \n"
#ifdef CONFIG_SMP
@@ -320,7 +322,9 @@ static inline unsigned long __cmpxchg_u32(volatile int * m, unsigned long old,
" .set mips3 \n"
"1: ll %0, %2 # __cmpxchg_u32 \n"
" bne %0, %z3, 2f \n"
+ " .set mips0 \n"
" move $1, %z4 \n"
+ " .set mips3 \n"
" sc $1, %1 \n"
" beqz $1, 1b \n"
#ifdef CONFIG_SMP