diff options
| author | Linus Torvalds <torvalds@linux-foundation.org> | 2008-05-09 08:06:31 -0700 |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2008-05-09 08:06:31 -0700 |
| commit | d9a9a23ff2b00463f25e880d13364938b321ab8a (patch) | |
| tree | e5ddb542d535ea741227265545a885636f8967aa /include/asm-powerpc/pgtable-ppc32.h | |
| parent | 9b013c2820c409ff84871e55e407ec2181782773 (diff) | |
| parent | 53962ecf6ebbdb5b15a8b35fbefe34430eb25609 (diff) | |
Merge branch 'merge' of git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc
* 'merge' of git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc: (23 commits)
[POWERPC] Remove leftover printk in isa-bridge.c
[POWERPC] Remove duplicate #include
[POWERPC] Initialize lockdep earlier
[POWERPC] Document when printk is useable
[POWERPC] Fix bogus paca->_current initialization
[POWERPC] Fix of_i2c include for module compilation
[POWERPC] Make default cputable entries reflect selected CPU family
[POWERPC] spufs: lockdep annotations for spufs_dir_close
[POWERPC] spufs: don't requeue victim contex in find_victim if it's not in spu_run
[POWERPC] 4xx: Fix PCI mem in sequoia DTS
[POWERPC] 4xx: Add endpoint support to 4xx PCIe driver
[POWERPC] 4xx: Fix problem with new TLB storage attibute fields on 440x6 core
[POWERPC] spufs: spu_create should send inotify IM_CREATE event
[POWERPC] spufs: handle faults while the context switch pending flag is set
[POWERPC] spufs: fix concurrent delivery of class 0 & 1 exceptions
[POWERPC] spufs: try to route SPU interrupts to local node
[POWERPC] spufs: set SPU_CONTEXT_SWITCH_PENDING before synchronising SPU irqs
[POWERPC] spufs: don't acquire state_mutex interruptible while performing callback
[POWERPC] spufs: update master runcntl with context lock held
[POWERPC] spufs: fix post-stopped update of MFC_CNTL register
...
Diffstat (limited to 'include/asm-powerpc/pgtable-ppc32.h')
| -rw-r--r-- | include/asm-powerpc/pgtable-ppc32.h | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/include/asm-powerpc/pgtable-ppc32.h b/include/asm-powerpc/pgtable-ppc32.h index 7c97b5a08d0..c08e714d0c4 100644 --- a/include/asm-powerpc/pgtable-ppc32.h +++ b/include/asm-powerpc/pgtable-ppc32.h @@ -209,6 +209,13 @@ extern int icache_44x_need_flush; * 0 1 2 3 4 ... 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 * - - - - - - U0 U1 U2 U3 W I M G E - UX UW UR SX SW SR * + * Newer 440 cores (440x6 as used on AMCC 460EX/460GT) have additional + * TLB2 storage attibute fields. Those are: + * + * TLB2: + * 0...10 11 12 13 14 15 16...31 + * no change WL1 IL1I IL1D IL2I IL2D no change + * * There are some constrains and options, to decide mapping software bits * into TLB entry. * |