diff options
author | Paul Mackerras <paulus@samba.org> | 2008-05-09 20:12:06 +1000 |
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committer | Paul Mackerras <paulus@samba.org> | 2008-05-09 20:12:06 +1000 |
commit | 2a5f2e3e6cd1ce9fb3f8b186b6bc9aa1f1497a92 (patch) | |
tree | b2306840f227972a7c9d4a2b75e516fe81358ce8 /include/asm-powerpc/pgtable-ppc32.h | |
parent | 02539d71fa98d5737bb668b02286c76241e4bac9 (diff) | |
parent | 78be76476a34a77f0ea9db2f78ba46a2b0fd5ab5 (diff) |
Merge branch 'for-2.6.26' of master.kernel.org:/pub/scm/linux/kernel/git/jwboyer/powerpc-4xx into merge
Diffstat (limited to 'include/asm-powerpc/pgtable-ppc32.h')
-rw-r--r-- | include/asm-powerpc/pgtable-ppc32.h | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/include/asm-powerpc/pgtable-ppc32.h b/include/asm-powerpc/pgtable-ppc32.h index 7c97b5a08d0..c08e714d0c4 100644 --- a/include/asm-powerpc/pgtable-ppc32.h +++ b/include/asm-powerpc/pgtable-ppc32.h @@ -209,6 +209,13 @@ extern int icache_44x_need_flush; * 0 1 2 3 4 ... 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 * - - - - - - U0 U1 U2 U3 W I M G E - UX UW UR SX SW SR * + * Newer 440 cores (440x6 as used on AMCC 460EX/460GT) have additional + * TLB2 storage attibute fields. Those are: + * + * TLB2: + * 0...10 11 12 13 14 15 16...31 + * no change WL1 IL1I IL1D IL2I IL2D no change + * * There are some constrains and options, to decide mapping software bits * into TLB entry. * |