diff options
| author | Sergei Shtylylov <sshtylyov@ru.mvista.com> | 2006-01-25 21:27:10 +0300 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2006-02-07 13:30:23 +0000 |
| commit | 80730555af2ef1932bd8b9943333e8837dddfacc (patch) | |
| tree | 881772d4c6d1b59bc7d3d101dad9465a2af1c682 /include/asm-ppc/traps.h | |
| parent | 6fe2a5681fff0cbeaf9a2d3778661be62a7f2f06 (diff) | |
[MIPS] Au1xx0: really set KSEG0 to uncached on reboot
Fix a really old buglet in AMD Au1xx0 restart code: instead of
modifying the whole CP0 Config.K0 field to 010b (meaning KSEG0 uncached)
before flushing the caches and resetting a board, it only sets bit 1 of that
reg. which is effectively a NOP since Config.K0 == 011b as the kernel sets it
up (which is also its default value for Au1xx0).
Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'include/asm-ppc/traps.h')
0 files changed, 0 insertions, 0 deletions