diff options
author | Linus Torvalds <torvalds@g5.osdl.org> | 2006-09-27 08:49:07 -0700 |
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committer | Linus Torvalds <torvalds@g5.osdl.org> | 2006-09-27 08:49:07 -0700 |
commit | b98adfccdf5f8dd34ae56a2d5adbe2c030bd4674 (patch) | |
tree | 1807a029520f550dd4f90c95ad0063bceb00d645 /include/asm-sh/cache.h | |
parent | ba21fe71725f94792330ebc3034ef2b35a36276f (diff) | |
parent | 33573c0e3243aaa38b6ad96942de85a1b713c2ff (diff) |
Merge master.kernel.org:/pub/scm/linux/kernel/git/lethal/sh-2.6
* master.kernel.org:/pub/scm/linux/kernel/git/lethal/sh-2.6: (108 commits)
sh: Fix occasional flush_cache_4096() stack corruption.
sh: Calculate shm alignment at runtime.
sh: dma-mapping compile fixes.
sh: Initial vsyscall page support.
sh: Clean up PAGE_SIZE definition for assembly use.
sh: Selective flush_cache_mm() flushing.
sh: More intelligent entry_mask/way_size calculation.
sh: Support for L2 cache on newer SH-4A CPUs.
sh: Update kexec support for API changes.
sh: Optimized readsl()/writesl() support.
sh: Report movli.l/movco.l capabilities.
sh: CPU flags in AT_HWCAP in ELF auxvt.
sh: Add support for 4K stacks.
sh: Enable /proc/kcore support.
sh: stack debugging support.
sh: select CONFIG_EMBEDDED.
sh: machvec rework.
sh: Solution Engine SH7343 board support.
sh: SH7710VoIPGW board support.
sh: Enable verbose BUG() support.
...
Diffstat (limited to 'include/asm-sh/cache.h')
-rw-r--r-- | include/asm-sh/cache.h | 30 |
1 files changed, 18 insertions, 12 deletions
diff --git a/include/asm-sh/cache.h b/include/asm-sh/cache.h index 656fdfe9e8b..e3a180cf506 100644 --- a/include/asm-sh/cache.h +++ b/include/asm-sh/cache.h @@ -10,7 +10,6 @@ #ifdef __KERNEL__ #include <asm/cpu/cache.h> -#include <asm/cpu/cacheflush.h> #define SH_CACHE_VALID 1 #define SH_CACHE_UPDATED 2 @@ -23,24 +22,31 @@ #define L1_CACHE_ALIGN(x) (((x)+(L1_CACHE_BYTES-1))&~(L1_CACHE_BYTES-1)) struct cache_info { - unsigned int ways; - unsigned int sets; - unsigned int linesz; + unsigned int ways; /* Number of cache ways */ + unsigned int sets; /* Number of cache sets */ + unsigned int linesz; /* Cache line size (bytes) */ - unsigned int way_incr; + unsigned int way_size; /* sets * line size */ + /* + * way_incr is the address offset for accessing the next way + * in memory mapped cache array ops. + */ + unsigned int way_incr; unsigned int entry_shift; unsigned int entry_mask; + /* + * Compute a mask which selects the address bits which overlap between + * 1. those used to select the cache set during indexing + * 2. those in the physical page number. + */ + unsigned int alias_mask; + + unsigned int n_aliases; /* Number of aliases */ + unsigned long flags; }; -/* Flush (write-back only) a region (smaller than a page) */ -extern void __flush_wback_region(void *start, int size); -/* Flush (write-back & invalidate) a region (smaller than a page) */ -extern void __flush_purge_region(void *start, int size); -/* Flush (invalidate only) a region (smaller than a page) */ -extern void __flush_invalidate_region(void *start, int size); - #endif /* __KERNEL__ */ #endif /* __ASM_SH_CACHE_H */ |