summaryrefslogtreecommitdiffstats
path: root/include/asm-sh/cpu-sh2/cacheflush.h
diff options
context:
space:
mode:
authorIngo Molnar <mingo@elte.hu>2008-08-14 12:19:59 +0200
committerIngo Molnar <mingo@elte.hu>2008-08-14 12:19:59 +0200
commit8d7ccaa545490cdffdfaff0842436a8dd85cf47b (patch)
tree8129b5907161bc6ae26deb3645ce1e280c5e1f51 /include/asm-sh/cpu-sh2/cacheflush.h
parentb2139aa0eec330c711c5a279db361e5ef1178e78 (diff)
parent30a2f3c60a84092c8084dfe788b710f8d0768cd4 (diff)
Merge commit 'v2.6.27-rc3' into x86/prototypes
Conflicts: include/asm-x86/dma-mapping.h Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'include/asm-sh/cpu-sh2/cacheflush.h')
-rw-r--r--include/asm-sh/cpu-sh2/cacheflush.h44
1 files changed, 0 insertions, 44 deletions
diff --git a/include/asm-sh/cpu-sh2/cacheflush.h b/include/asm-sh/cpu-sh2/cacheflush.h
deleted file mode 100644
index 2979efb26de..00000000000
--- a/include/asm-sh/cpu-sh2/cacheflush.h
+++ /dev/null
@@ -1,44 +0,0 @@
-/*
- * include/asm-sh/cpu-sh2/cacheflush.h
- *
- * Copyright (C) 2003 Paul Mundt
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- */
-#ifndef __ASM_CPU_SH2_CACHEFLUSH_H
-#define __ASM_CPU_SH2_CACHEFLUSH_H
-
-/*
- * Cache flushing:
- *
- * - flush_cache_all() flushes entire cache
- * - flush_cache_mm(mm) flushes the specified mm context's cache lines
- * - flush_cache_dup mm(mm) handles cache flushing when forking
- * - flush_cache_page(mm, vmaddr, pfn) flushes a single page
- * - flush_cache_range(vma, start, end) flushes a range of pages
- *
- * - flush_dcache_page(pg) flushes(wback&invalidates) a page for dcache
- * - flush_icache_range(start, end) flushes(invalidates) a range for icache
- * - flush_icache_page(vma, pg) flushes(invalidates) a page for icache
- *
- * Caches are indexed (effectively) by physical address on SH-2, so
- * we don't need them.
- */
-#define flush_cache_all() do { } while (0)
-#define flush_cache_mm(mm) do { } while (0)
-#define flush_cache_dup_mm(mm) do { } while (0)
-#define flush_cache_range(vma, start, end) do { } while (0)
-#define flush_cache_page(vma, vmaddr, pfn) do { } while (0)
-#define flush_dcache_page(page) do { } while (0)
-#define flush_dcache_mmap_lock(mapping) do { } while (0)
-#define flush_dcache_mmap_unlock(mapping) do { } while (0)
-#define flush_icache_range(start, end) do { } while (0)
-#define flush_icache_page(vma,pg) do { } while (0)
-#define flush_icache_user_range(vma,pg,adr,len) do { } while (0)
-#define flush_cache_sigtramp(vaddr) do { } while (0)
-
-#define p3_cache_init() do { } while (0)
-#endif /* __ASM_CPU_SH2_CACHEFLUSH_H */
-