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authorPaul Mundt <lethal@linux-sh.org>2006-09-27 14:31:40 +0900
committerPaul Mundt <lethal@linux-sh.org>2006-09-27 14:31:40 +0900
commit5b19c9081fbd0882c936ec087bf9055a20251dec (patch)
tree3bfb5779699b485fcf524ea34dd227e42f74ae78 /include/asm-sh/cpu-sh4/cache.h
parent555ef1963029d19d2367acd09f6b9a6a0056f217 (diff)
sh: Support for SH7770/SH7780 CPU subtypes.
Merge support for SH7770 and SH7780 SH-4A subtypes. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'include/asm-sh/cpu-sh4/cache.h')
-rw-r--r--include/asm-sh/cpu-sh4/cache.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/include/asm-sh/cpu-sh4/cache.h b/include/asm-sh/cpu-sh4/cache.h
index 1fe20359312..6e9c7e6ee8e 100644
--- a/include/asm-sh/cpu-sh4/cache.h
+++ b/include/asm-sh/cpu-sh4/cache.h
@@ -22,7 +22,9 @@
#define CCR_CACHE_ICE 0x0100 /* Instruction Cache Enable */
#define CCR_CACHE_ICI 0x0800 /* IC Invalidate */
#define CCR_CACHE_IIX 0x8000 /* IC Index Enable */
+#ifndef CONFIG_CPU_SUBTYPE_SH7780
#define CCR_CACHE_EMODE 0x80000000 /* EMODE Enable */
+#endif
/* Default CCR setup: 8k+16k-byte cache,P1-wb,enable */
#define CCR_CACHE_ENABLE (CCR_CACHE_OCE|CCR_CACHE_ICE)