summaryrefslogtreecommitdiffstats
path: root/include/asm-sh/microdev.h
diff options
context:
space:
mode:
authorJoe Perches <joe@perches.com>2007-12-18 09:40:33 +0900
committerPaul Mundt <lethal@linux-sh.org>2008-01-28 13:19:01 +0900
commit0095d58b4a91b9fb57aeb781909355b232517c64 (patch)
tree906205907e986fcb23aedd77bea82b340559a5dd /include/asm-sh/microdev.h
parenteb9c7f4198636fb74ea1ec60c0fff2d1a840b4ed (diff)
sh: include/asm-sh/: Spelling fixes.
Signed-off-by: Joe Perches <joe@perches.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'include/asm-sh/microdev.h')
-rw-r--r--include/asm-sh/microdev.h4
1 files changed, 2 insertions, 2 deletions
diff --git a/include/asm-sh/microdev.h b/include/asm-sh/microdev.h
index 018332a9e59..1aed15856e1 100644
--- a/include/asm-sh/microdev.h
+++ b/include/asm-sh/microdev.h
@@ -17,7 +17,7 @@ extern void microdev_print_fpga_intc_status(void);
/*
* The following are useful macros for manipulating the interrupt
* controller (INTC) on the CPU-board FPGA. should be noted that there
- * is an INTC on the FPGA, and a seperate INTC on the SH4-202 core -
+ * is an INTC on the FPGA, and a separate INTC on the SH4-202 core -
* these are two different things, both of which need to be prorammed to
* correctly route - unfortunately, they have the same name and
* abbreviations!
@@ -25,7 +25,7 @@ extern void microdev_print_fpga_intc_status(void);
#define MICRODEV_FPGA_INTC_BASE 0xa6110000ul /* INTC base address on CPU-board FPGA */
#define MICRODEV_FPGA_INTENB_REG (MICRODEV_FPGA_INTC_BASE+0ul) /* Interrupt Enable Register on INTC on CPU-board FPGA */
#define MICRODEV_FPGA_INTDSB_REG (MICRODEV_FPGA_INTC_BASE+8ul) /* Interrupt Disable Register on INTC on CPU-board FPGA */
-#define MICRODEV_FPGA_INTC_MASK(n) (1ul<<(n)) /* Interupt mask to enable/disable INTC in CPU-board FPGA */
+#define MICRODEV_FPGA_INTC_MASK(n) (1ul<<(n)) /* Interrupt mask to enable/disable INTC in CPU-board FPGA */
#define MICRODEV_FPGA_INTPRI_REG(n) (MICRODEV_FPGA_INTC_BASE+0x10+((n)/8)*8)/* Interrupt Priority Register on INTC on CPU-board FPGA */
#define MICRODEV_FPGA_INTPRI_LEVEL(n,x) ((x)<<(((n)%8)*4)) /* MICRODEV_FPGA_INTPRI_LEVEL(int_number, int_level) */
#define MICRODEV_FPGA_INTPRI_MASK(n) (MICRODEV_FPGA_INTPRI_LEVEL((n),0xful)) /* Interrupt Priority Mask on INTC on CPU-board FPGA */