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authorPaul Mundt <lethal@linux-sh.org>2006-09-27 15:41:24 +0900
committerPaul Mundt <lethal@linux-sh.org>2006-09-27 15:41:24 +0900
commit373e68b5472d421cbd2703e7a77caf053f78c005 (patch)
tree6fed51fdf1b89f80a1ec9ea4aab285c1af649945 /include/asm-sh/se
parentf647d33f879d258de4ab2559975bd6eebda2033e (diff)
sh: Board updates for I/O routine rework.
This updates the various boards for some of the recent I/O routine updates. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'include/asm-sh/se')
-rw-r--r--include/asm-sh/se/io.h35
-rw-r--r--include/asm-sh/se/se.h77
2 files changed, 0 insertions, 112 deletions
diff --git a/include/asm-sh/se/io.h b/include/asm-sh/se/io.h
deleted file mode 100644
index 9eeb86cd6ce..00000000000
--- a/include/asm-sh/se/io.h
+++ /dev/null
@@ -1,35 +0,0 @@
-/*
- * include/asm-sh/io_se.h
- *
- * Copyright 2000 Stuart Menefy (stuart.menefy@st.com)
- *
- * May be copied or modified under the terms of the GNU General Public
- * License. See linux/COPYING for more information.
- *
- * IO functions for an Hitachi SolutionEngine
- */
-
-#ifndef _ASM_SH_IO_SE_H
-#define _ASM_SH_IO_SE_H
-
-extern unsigned char se_inb(unsigned long port);
-extern unsigned short se_inw(unsigned long port);
-extern unsigned int se_inl(unsigned long port);
-
-extern void se_outb(unsigned char value, unsigned long port);
-extern void se_outw(unsigned short value, unsigned long port);
-extern void se_outl(unsigned int value, unsigned long port);
-
-extern unsigned char se_inb_p(unsigned long port);
-extern void se_outb_p(unsigned char value, unsigned long port);
-
-extern void se_insb(unsigned long port, void *addr, unsigned long count);
-extern void se_insw(unsigned long port, void *addr, unsigned long count);
-extern void se_insl(unsigned long port, void *addr, unsigned long count);
-extern void se_outsb(unsigned long port, const void *addr, unsigned long count);
-extern void se_outsw(unsigned long port, const void *addr, unsigned long count);
-extern void se_outsl(unsigned long port, const void *addr, unsigned long count);
-
-extern unsigned long se_isa_port2addr(unsigned long offset);
-
-#endif /* _ASM_SH_IO_SE_H */
diff --git a/include/asm-sh/se/se.h b/include/asm-sh/se/se.h
deleted file mode 100644
index 791c5da0388..00000000000
--- a/include/asm-sh/se/se.h
+++ /dev/null
@@ -1,77 +0,0 @@
-#ifndef __ASM_SH_HITACHI_SE_H
-#define __ASM_SH_HITACHI_SE_H
-
-/*
- * linux/include/asm-sh/hitachi_se.h
- *
- * Copyright (C) 2000 Kazumoto Kojima
- *
- * Hitachi SolutionEngine support
- */
-
-/* Box specific addresses. */
-
-#define PA_ROM 0x00000000 /* EPROM */
-#define PA_ROM_SIZE 0x00400000 /* EPROM size 4M byte */
-#define PA_FROM 0x01000000 /* EPROM */
-#define PA_FROM_SIZE 0x00400000 /* EPROM size 4M byte */
-#define PA_EXT1 0x04000000
-#define PA_EXT1_SIZE 0x04000000
-#define PA_EXT2 0x08000000
-#define PA_EXT2_SIZE 0x04000000
-#define PA_SDRAM 0x0c000000
-#define PA_SDRAM_SIZE 0x04000000
-
-#define PA_EXT4 0x12000000
-#define PA_EXT4_SIZE 0x02000000
-#define PA_EXT5 0x14000000
-#define PA_EXT5_SIZE 0x04000000
-#define PA_PCIC 0x18000000 /* MR-SHPC-01 PCMCIA */
-
-#define PA_83902 0xb0000000 /* DP83902A */
-#define PA_83902_IF 0xb0040000 /* DP83902A remote io port */
-#define PA_83902_RST 0xb0080000 /* DP83902A reset port */
-
-#define PA_SUPERIO 0xb0400000 /* SMC37C935A super io chip */
-#define PA_DIPSW0 0xb0800000 /* Dip switch 5,6 */
-#define PA_DIPSW1 0xb0800002 /* Dip switch 7,8 */
-#define PA_LED 0xb0c00000 /* LED */
-#if defined(CONFIG_CPU_SUBTYPE_SH7705)
-#define PA_BCR 0xb0e00000
-#else
-#define PA_BCR 0xb1400000 /* FPGA */
-#endif
-
-#define PA_MRSHPC 0xb83fffe0 /* MR-SHPC-01 PCMCIA controller */
-#define PA_MRSHPC_MW1 0xb8400000 /* MR-SHPC-01 memory window base */
-#define PA_MRSHPC_MW2 0xb8500000 /* MR-SHPC-01 attribute window base */
-#define PA_MRSHPC_IO 0xb8600000 /* MR-SHPC-01 I/O window base */
-#define MRSHPC_OPTION (PA_MRSHPC + 6)
-#define MRSHPC_CSR (PA_MRSHPC + 8)
-#define MRSHPC_ISR (PA_MRSHPC + 10)
-#define MRSHPC_ICR (PA_MRSHPC + 12)
-#define MRSHPC_CPWCR (PA_MRSHPC + 14)
-#define MRSHPC_MW0CR1 (PA_MRSHPC + 16)
-#define MRSHPC_MW1CR1 (PA_MRSHPC + 18)
-#define MRSHPC_IOWCR1 (PA_MRSHPC + 20)
-#define MRSHPC_MW0CR2 (PA_MRSHPC + 22)
-#define MRSHPC_MW1CR2 (PA_MRSHPC + 24)
-#define MRSHPC_IOWCR2 (PA_MRSHPC + 26)
-#define MRSHPC_CDCR (PA_MRSHPC + 28)
-#define MRSHPC_PCIC_INFO (PA_MRSHPC + 30)
-
-#define BCR_ILCRA (PA_BCR + 0)
-#define BCR_ILCRB (PA_BCR + 2)
-#define BCR_ILCRC (PA_BCR + 4)
-#define BCR_ILCRD (PA_BCR + 6)
-#define BCR_ILCRE (PA_BCR + 8)
-#define BCR_ILCRF (PA_BCR + 10)
-#define BCR_ILCRG (PA_BCR + 12)
-
-#if defined(CONFIG_CPU_SUBTYPE_SH7705)
-#define IRQ_STNIC 12
-#else
-#define IRQ_STNIC 10
-#endif
-
-#endif /* __ASM_SH_HITACHI_SE_H */