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authorJeff Garzik <jgarzik@pobox.com>2005-11-05 14:38:55 -0500
committerJeff Garzik <jgarzik@pobox.com>2005-11-05 14:38:55 -0500
commit328198acb7407301ddf6005c0fa1e04bd0c539c8 (patch)
tree9936112bd195bfbaacc9a75f2ea7ff757a2c0546 /include/asm-um/cache.h
parent9e0cb06b17be7e562cbdaba2768649f025826dc6 (diff)
parentfecb4a0c87c2bcaee1f3cf800126eef752a07ed3 (diff)
Merge branch 'master'
Diffstat (limited to 'include/asm-um/cache.h')
-rw-r--r--include/asm-um/cache.h19
1 files changed, 15 insertions, 4 deletions
diff --git a/include/asm-um/cache.h b/include/asm-um/cache.h
index 4b134fe8504..a10602a5b2d 100644
--- a/include/asm-um/cache.h
+++ b/include/asm-um/cache.h
@@ -1,10 +1,21 @@
#ifndef __UM_CACHE_H
#define __UM_CACHE_H
-/* These are x86 numbers */
-#define L1_CACHE_SHIFT 5
-#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT)
+#include <linux/config.h>
-#define L1_CACHE_SHIFT_MAX 7 /* largest L1 which this arch supports */
+#if defined(CONFIG_UML_X86) && !defined(CONFIG_64BIT)
+# define L1_CACHE_SHIFT (CONFIG_X86_L1_CACHE_SHIFT)
+#elif defined(CONFIG_UML_X86) /* 64-bit */
+# define L1_CACHE_SHIFT 6 /* Should be 7 on Intel */
+#else
+/* XXX: this was taken from x86, now it's completely random. Luckily only
+ * affects SMP padding. */
+# define L1_CACHE_SHIFT 5
+#endif
+
+/* XXX: this is valid for x86 and x86_64. */
+#define L1_CACHE_SHIFT_MAX 7 /* largest L1 which this arch supports */
+
+#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT)
#endif