diff options
| author | Linus Torvalds <torvalds@ppc970.osdl.org> | 2005-04-16 15:20:36 -0700 |
|---|---|---|
| committer | Linus Torvalds <torvalds@ppc970.osdl.org> | 2005-04-16 15:20:36 -0700 |
| commit | 1da177e4c3f41524e886b7f1b8a0c1fc7321cac2 (patch) | |
| tree | 0bba044c4ce775e45a88a51686b5d9f90697ea9d /include/asm-v850/sim.h | |
Linux-2.6.12-rc2v2.6.12-rc2
Initial git repository build. I'm not bothering with the full history,
even though we have it. We can create a separate "historical" git
archive of that later if we want to, and in the meantime it's about
3.2GB when imported into git - space that would just make the early
git days unnecessarily complicated, when we don't have a lot of good
infrastructure for it.
Let it rip!
Diffstat (limited to 'include/asm-v850/sim.h')
| -rw-r--r-- | include/asm-v850/sim.h | 52 |
1 files changed, 52 insertions, 0 deletions
diff --git a/include/asm-v850/sim.h b/include/asm-v850/sim.h new file mode 100644 index 00000000000..10236abbe9b --- /dev/null +++ b/include/asm-v850/sim.h @@ -0,0 +1,52 @@ +/* + * include/asm-v850/sim.h -- Machine-dependent defs for GDB v850e simulator + * + * Copyright (C) 2001,02,03 NEC Electronics Corporation + * Copyright (C) 2001,02,03 Miles Bader <miles@gnu.org> + * + * This file is subject to the terms and conditions of the GNU General + * Public License. See the file COPYING in the main directory of this + * archive for more details. + * + * Written by Miles Bader <miles@gnu.org> + */ + +#ifndef __V850_SIM_H__ +#define __V850_SIM_H__ + + +#define CPU_ARCH "v850e" +#define CPU_MODEL "v850e" +#define CPU_MODEL_LONG "NEC V850E" +#define PLATFORM "gdb/v850e" +#define PLATFORM_LONG "GDB V850E simulator" + + +/* We use a weird value for RAM, not just 0, for testing purposes. + These must match the values used in the linker script. */ +#define RAM_ADDR 0x8F000000 +#define RAM_SIZE 0x03000000 + + +/* For <asm/page.h> */ +#define PAGE_OFFSET RAM_ADDR + + +/* For <asm/entry.h> */ +/* `R0 RAM', used for a few miscellaneous variables that must be + accessible using a load instruction relative to R0. On real + processors, this usually is on-chip RAM, but here we just + choose an arbitrary address that meets the above constraint. */ +#define R0_RAM_ADDR 0xFFFFF000 + + +/* For <asm/param.h> */ +#ifndef HZ +#define HZ 24 /* Minimum supported frequency. */ +#endif + +/* For <asm/irq.h> */ +#define NUM_CPU_IRQS 6 + + +#endif /* __V850_SIM_H__ */ |