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authorH. Peter Anvin <hpa@zytor.com>2008-01-30 13:33:02 +0100
committerIngo Molnar <mingo@elte.hu>2008-01-30 13:33:02 +0100
commit88089519f302f1296b4739be45699f06f728ec31 (patch)
treea0ffb023be68d0b83503e77ba4a9d9b43acea88b /include/asm-x86/segment.h
parentc4d9ba6da9f050ebb7e0d70769e3dca0fd45334f (diff)
x86 setup: initialize LDTR and TR to make life easier to Intel VT
Intel VT doesn't like to engage when the protected-mode state isn't fully initialized. Make life easier for it by initializing LDTR (to null) and TR (to a dummy hunk of low memory which will never actually be touched.) Signed-off-by: H. Peter Anvin <hpa@zytor.com> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'include/asm-x86/segment.h')
-rw-r--r--include/asm-x86/segment.h3
1 files changed, 3 insertions, 0 deletions
diff --git a/include/asm-x86/segment.h b/include/asm-x86/segment.h
index 1ff05a9f551..57c8d372383 100644
--- a/include/asm-x86/segment.h
+++ b/include/asm-x86/segment.h
@@ -9,6 +9,9 @@
#define GDT_ENTRY_BOOT_DS (GDT_ENTRY_BOOT_CS + 1)
#define __BOOT_DS (GDT_ENTRY_BOOT_DS * 8)
+#define GDT_ENTRY_BOOT_TSS (GDT_ENTRY_BOOT_CS + 2)
+#define __BOOT_TSS (GDT_ENTRY_BOOT_TSS * 8)
+
#ifdef CONFIG_X86_32
/*
* The layout of the per-CPU GDT under Linux: