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authorJoerg Roedel <joerg.roedel@amd.com>2008-07-03 19:35:08 +0200
committerIngo Molnar <mingo@elte.hu>2008-07-04 11:44:40 +0200
commit999ba417cc1a43881126d08876d5d7e653113ae3 (patch)
tree6e8bcde9d590566e61c96491d3959d9c01c39066 /include/asm-x86
parent5f6a59d8ad55781d4d2ff0d327f84aaeed2c4127 (diff)
x86, AMD IOMMU: flush domain TLB when there is more than one page to flush
This patch changes the domain TLB flushing behavior of the driver. When there is more than one page to flush it flushes the whole domain TLB instead of every single page. So we send only a single command to the IOMMU in every case which is faster to execute. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com> Cc: iommu@lists.linux-foundation.org Cc: bhavna.sarathy@amd.com Cc: robert.richter@amd.com Cc: Joerg Roedel <joerg.roedel@amd.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'include/asm-x86')
-rw-r--r--include/asm-x86/amd_iommu_types.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/include/asm-x86/amd_iommu_types.h b/include/asm-x86/amd_iommu_types.h
index 0f395501ab8..7bfcb47cc45 100644
--- a/include/asm-x86/amd_iommu_types.h
+++ b/include/asm-x86/amd_iommu_types.h
@@ -93,6 +93,8 @@
#define CMD_INV_IOMMU_PAGES_SIZE_MASK 0x01
#define CMD_INV_IOMMU_PAGES_PDE_MASK 0x02
+#define CMD_INV_IOMMU_ALL_PAGES_ADDRESS 0x7fffffffffffffffULL
+
/* macros and definitions for device table entries */
#define DEV_ENTRY_VALID 0x00
#define DEV_ENTRY_TRANSLATION 0x01