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| author | Jeff Garzik <jgarzik@pobox.com> | 2006-02-09 00:58:59 -0500 |
|---|---|---|
| committer | Jeff Garzik <jgarzik@pobox.com> | 2006-02-09 00:58:59 -0500 |
| commit | cac0e8e8bb2e7a086643bdd00c41d900a79bb4fa (patch) | |
| tree | 73cd85e5529a01fa2338ab6d58b99c36dd666cbe /include/asm-x86_64/cpufeature.h | |
| parent | ddef9bb367b19383df627e388cb4c01c86ddba6c (diff) | |
| parent | 0bdd340c092b0936f78a54bdbd3927463ed4fca3 (diff) | |
Merge branch 'master'
Diffstat (limited to 'include/asm-x86_64/cpufeature.h')
| -rw-r--r-- | include/asm-x86_64/cpufeature.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/include/asm-x86_64/cpufeature.h b/include/asm-x86_64/cpufeature.h index 41c0ac8559b..76bb6193ae9 100644 --- a/include/asm-x86_64/cpufeature.h +++ b/include/asm-x86_64/cpufeature.h @@ -61,7 +61,7 @@ #define X86_FEATURE_K6_MTRR (3*32+ 1) /* AMD K6 nonstandard MTRRs */ #define X86_FEATURE_CYRIX_ARR (3*32+ 2) /* Cyrix ARRs (= MTRRs) */ #define X86_FEATURE_CENTAUR_MCR (3*32+ 3) /* Centaur MCRs (= MTRRs) */ -/* 4 free */ +#define X86_FEATURE_REP_GOOD (3*32+ 4) /* rep microcode works well on this CPU */ #define X86_FEATURE_CONSTANT_TSC (3*32+5) /* TSC runs at constant rate */ #define X86_FEATURE_SYNC_RDTSC (3*32+6) /* RDTSC syncs CPU core */ |