diff options
| author | Rudolf Marek <r.marek@assembler.cz> | 2007-05-08 17:22:01 +0200 |
|---|---|---|
| committer | Jean Delvare <khali@hyperion.delvare> | 2007-05-08 17:22:01 +0200 |
| commit | 4e9baad8f5cb2040e802eff484fad7e721b21c0b (patch) | |
| tree | 35bd0bdbc9185b0a21d56b32fbd78390a06b1b41 /include/asm-x86_64 | |
| parent | 9ca8e40c8414d25e880b587cbd4d130750c49588 (diff) | |
i386: Add safe variants of rdmsr_on_cpu and wrmsr_on_cpu
Add safe (exception handled) variants of rdmsr_on_cpu and wrmsr_on_cpu.
You should use these when the target MSR may not actually exist, as
doing so could trigger an exception which the regular functions do not
handle. The safe variants are slower, though.
The upcoming coretemp hardware monitoring driver will need this.
Signed-off-by: Rudolf Marek <r.marek@assembler.cz>
Cc: Alexey Dobriyan <adobriyan@openvz.org>
Cc: Dave Jones <davej@redhat.com>
Signed-off-by: Jean Delvare <khali@linux-fr.org>
Diffstat (limited to 'include/asm-x86_64')
| -rw-r--r-- | include/asm-x86_64/msr.h | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/include/asm-x86_64/msr.h b/include/asm-x86_64/msr.h index a524f032567..d5c55b80da5 100644 --- a/include/asm-x86_64/msr.h +++ b/include/asm-x86_64/msr.h @@ -4,6 +4,7 @@ #include <asm/msr-index.h> #ifndef __ASSEMBLY__ +#include <linux/errno.h> /* * Access to machine-specific registers (available on 586 and better only) * Note: the rd* operations modify the parameters directly (without using @@ -162,6 +163,8 @@ static inline unsigned int cpuid_edx(unsigned int op) #ifdef CONFIG_SMP void rdmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 *l, u32 *h); void wrmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h); +int rdmsr_safe_on_cpu(unsigned int cpu, u32 msr_no, u32 *l, u32 *h); +int wrmsr_safe_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h); #else /* CONFIG_SMP */ static inline void rdmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 *l, u32 *h) { @@ -171,6 +174,14 @@ static inline void wrmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h) { wrmsr(msr_no, l, h); } +static inline int rdmsr_safe_on_cpu(unsigned int cpu, u32 msr_no, u32 *l, u32 *h) +{ + return rdmsr_safe(msr_no, l, h); +} +static inline int wrmsr_safe_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h) +{ + return wrmsr_safe(msr_no, l, h); +} #endif /* CONFIG_SMP */ #endif /* __ASSEMBLY__ */ #endif /* X86_64_MSR_H */ |