diff options
| author | Dave Jones <davej@redhat.com> | 2006-12-12 17:41:41 -0500 |
|---|---|---|
| committer | Dave Jones <davej@redhat.com> | 2006-12-12 17:41:41 -0500 |
| commit | c4366889dda8110247be59ca41fddb82951a8c26 (patch) | |
| tree | 705c1a996bed8fd48ce94ff33ec9fd00f9b94875 /include/asm-xtensa/tlbflush.h | |
| parent | db2fb9db5735cc532fd4fc55e94b9a3c3750378e (diff) | |
| parent | e1036502e5263851259d147771226161e5ccc85a (diff) | |
Merge ../linus
Conflicts:
drivers/cpufreq/cpufreq.c
Diffstat (limited to 'include/asm-xtensa/tlbflush.h')
| -rw-r--r-- | include/asm-xtensa/tlbflush.h | 42 |
1 files changed, 22 insertions, 20 deletions
diff --git a/include/asm-xtensa/tlbflush.h b/include/asm-xtensa/tlbflush.h index 43f6ec859af..7c637b3c352 100644 --- a/include/asm-xtensa/tlbflush.h +++ b/include/asm-xtensa/tlbflush.h @@ -11,12 +11,20 @@ #ifndef _XTENSA_TLBFLUSH_H #define _XTENSA_TLBFLUSH_H -#define DEBUG_TLB - #ifdef __KERNEL__ -#include <asm/processor.h> #include <linux/stringify.h> +#include <asm/processor.h> + +#define DTLB_WAY_PGD 7 + +#define ITLB_ARF_WAYS 4 +#define DTLB_ARF_WAYS 4 + +#define ITLB_HIT_BIT 3 +#define DTLB_HIT_BIT 4 + +#ifndef __ASSEMBLY__ /* TLB flushing: * @@ -46,11 +54,6 @@ static inline void flush_tlb_pgtables(struct mm_struct *mm, /* TLB operations. */ -#define ITLB_WAYS_LOG2 XCHAL_ITLB_WAY_BITS -#define DTLB_WAYS_LOG2 XCHAL_DTLB_WAY_BITS -#define ITLB_PROBE_SUCCESS (1 << ITLB_WAYS_LOG2) -#define DTLB_PROBE_SUCCESS (1 << DTLB_WAYS_LOG2) - static inline unsigned long itlb_probe(unsigned long addr) { unsigned long tmp; @@ -131,29 +134,30 @@ static inline void write_itlb_entry (pte_t entry, int way) static inline void invalidate_page_directory (void) { - invalidate_dtlb_entry (DTLB_WAY_PGTABLE); + invalidate_dtlb_entry (DTLB_WAY_PGD); + invalidate_dtlb_entry (DTLB_WAY_PGD+1); + invalidate_dtlb_entry (DTLB_WAY_PGD+2); } static inline void invalidate_itlb_mapping (unsigned address) { unsigned long tlb_entry; - while ((tlb_entry = itlb_probe (address)) & ITLB_PROBE_SUCCESS) - invalidate_itlb_entry (tlb_entry); + if (((tlb_entry = itlb_probe(address)) & (1 << ITLB_HIT_BIT)) != 0) + invalidate_itlb_entry(tlb_entry); } static inline void invalidate_dtlb_mapping (unsigned address) { unsigned long tlb_entry; - while ((tlb_entry = dtlb_probe (address)) & DTLB_PROBE_SUCCESS) - invalidate_dtlb_entry (tlb_entry); + if (((tlb_entry = dtlb_probe(address)) & (1 << DTLB_HIT_BIT)) != 0) + invalidate_dtlb_entry(tlb_entry); } #define check_pgt_cache() do { } while (0) -#ifdef DEBUG_TLB - -/* DO NOT USE THESE FUNCTIONS. These instructions aren't part of the Xtensa +/* + * DO NOT USE THESE FUNCTIONS. These instructions aren't part of the Xtensa * ISA and exist only for test purposes.. * You may find it helpful for MMU debugging, however. * @@ -193,8 +197,6 @@ static inline unsigned long read_itlb_translation (int way) return tmp; } -#endif /* DEBUG_TLB */ - - +#endif /* __ASSEMBLY__ */ #endif /* __KERNEL__ */ -#endif /* _XTENSA_PGALLOC_H */ +#endif /* _XTENSA_TLBFLUSH_H */ |