diff options
author | Olof Johansson <olof@lixom.net> | 2014-01-08 22:08:01 -0800 |
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committer | Olof Johansson <olof@lixom.net> | 2014-01-08 22:08:01 -0800 |
commit | 708d2aa14d1eefef3dd758242787e837485baad7 (patch) | |
tree | f6966616ab3184764583ae4d6ae0e15bb44a06ac /include/dt-bindings/clock/r8a7791-clock.h | |
parent | 4ac383ed3a12a7a56d70456403b7abd95477d840 (diff) | |
parent | 3effae8c26f451a9d572255c08dfbe342dd1dc98 (diff) |
Merge tag 'renesas-dt-fixes-for-v3.14' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt
From Simon Horman:
Renesas ARM Based SoC DT Fixes for v3.14
Revert the addition of SSI clocks to DT for the
r8a7790 (R-Car H2) and r8a7791 (R-Car M2) SoCs.
Unfortunately these patches prevent booting the
r8a7790-based Lager board and r8a7791-based Koelsch board
to the point where a serial output is available.
A solution to this problem is being sought but has not
yet been finalised so in the mean time revert the changes.
* tag 'renesas-dt-fixes-for-v3.14' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
Revert "ARM: shmobile: r8a7791: Add SSI clocks in device tree"
Revert "ARM: shmobile: r8a7790: Add SSI clocks in device tree"
Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'include/dt-bindings/clock/r8a7791-clock.h')
-rw-r--r-- | include/dt-bindings/clock/r8a7791-clock.h | 13 |
1 files changed, 0 insertions, 13 deletions
diff --git a/include/dt-bindings/clock/r8a7791-clock.h b/include/dt-bindings/clock/r8a7791-clock.h index 1c8f00d0d88..30f82f286e2 100644 --- a/include/dt-bindings/clock/r8a7791-clock.h +++ b/include/dt-bindings/clock/r8a7791-clock.h @@ -103,19 +103,6 @@ #define R8A7791_CLK_I2C1 30 #define R8A7791_CLK_I2C0 31 -/* MSTP10 */ -#define R8A7791_CLK_SSI 5 -#define R8A7791_CLK_SSI9 6 -#define R8A7791_CLK_SSI8 7 -#define R8A7791_CLK_SSI7 8 -#define R8A7791_CLK_SSI6 9 -#define R8A7791_CLK_SSI5 10 -#define R8A7791_CLK_SSI4 11 -#define R8A7791_CLK_SSI3 12 -#define R8A7791_CLK_SSI2 13 -#define R8A7791_CLK_SSI1 14 -#define R8A7791_CLK_SSI0 15 - /* MSTP11 */ #define R8A7791_CLK_SCIFA3 6 #define R8A7791_CLK_SCIFA4 7 |