diff options
| author | Shengjiu Wang <shengjiu.wang@freescale.com> | 2014-09-04 17:48:58 +0800 |
|---|---|---|
| committer | Shawn Guo <shawn.guo@freescale.com> | 2014-09-16 10:06:47 +0800 |
| commit | aec247d4ac578693ee75ac2bf10eac1c29299c45 (patch) | |
| tree | 43ea4eacbe55e7f25ad6b5d8bce54f691e92f5a7 /include/dt-bindings | |
| parent | e37c1ad0327af0639f6358357f60f6209f8bbad6 (diff) | |
ARM: clk-imx6q: refine clock tree for ASRC
ASRC has "asrc", "asrc_ipg", "asrc_mem" clocks, and they share
the same gate bits.
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Diffstat (limited to 'include/dt-bindings')
| -rw-r--r-- | include/dt-bindings/clock/imx6qdl-clock.h | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/include/dt-bindings/clock/imx6qdl-clock.h b/include/dt-bindings/clock/imx6qdl-clock.h index 323e8650f19..1e996135cfc 100644 --- a/include/dt-bindings/clock/imx6qdl-clock.h +++ b/include/dt-bindings/clock/imx6qdl-clock.h @@ -220,6 +220,8 @@ #define IMX6QDL_CLK_LVDS2_GATE 207 #define IMX6QDL_CLK_ESAI_IPG 208 #define IMX6QDL_CLK_ESAI_MEM 209 -#define IMX6QDL_CLK_END 210 +#define IMX6QDL_CLK_ASRC_IPG 210 +#define IMX6QDL_CLK_ASRC_MEM 211 +#define IMX6QDL_CLK_END 212 #endif /* __DT_BINDINGS_CLOCK_IMX6QDL_H */ |