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authorArnd Bergmann <arnd@arndb.de>2014-11-20 17:36:23 +0100
committerArnd Bergmann <arnd@arndb.de>2014-11-20 17:36:23 +0100
commitec498f8e5178b5f1ff431464f4aa17e94fdbb5a0 (patch)
tree8cbc0c1d2eda5fba2806172f4098246289df5d65 /include/dt-bindings
parent3af1fda393e08f2e6e095d6e89299b30b35677fe (diff)
parent3ece2c2be34f2fe6254b49dffa5815e2fc7f1b71 (diff)
Merge tag 'sti-dt-for-v3.19-2' of git://git.stlinux.com/devel/kernel/linux-sti into next/dt
Pull "STi DT updates for v3.19, round 2" from Maxime Coquelin: Highlights: ----------- - Refactor STiH407 SoC and board to add STiH410 SoC support - Add USB support to STiH416 SoC * tag 'sti-dt-for-v3.19-2' of git://git.stlinux.com/devel/kernel/linux-sti: ARM: STi: DT: STiH416: Change miphy356 node name to phy@fe382000 ARM: STi: DT: STih407: STih410: Add clk_ignore_unused to kernel bootargs ARM: STi: DT: STiH410: Add STiH410 SoC and b2120 board support. ARM: STi: DT: STih407: Abstract common dt nodes into shared files. ARM: STi: DT: STiH410: Add pinctl config for usb controllers. ARM: STi: DT: STiH410: Add defines for STiH410 DT clocks ARM: STi: DT: STiH416: Add DT nodes for the ehci and ohci usb controllers. ARM: STi: DT: STiH416: Add DT node for the stih415/6 usb2 phy ARM: STi: DT: STiH416: Add pinctl setup for usb controllers. Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'include/dt-bindings')
-rw-r--r--include/dt-bindings/clock/stih410-clks.h25
1 files changed, 25 insertions, 0 deletions
diff --git a/include/dt-bindings/clock/stih410-clks.h b/include/dt-bindings/clock/stih410-clks.h
new file mode 100644
index 00000000000..2097a4bbe15
--- /dev/null
+++ b/include/dt-bindings/clock/stih410-clks.h
@@ -0,0 +1,25 @@
+/*
+ * This header provides constants clk index STMicroelectronics
+ * STiH410 SoC.
+ */
+#ifndef _DT_BINDINGS_CLK_STIH410
+#define _DT_BINDINGS_CLK_STIH410
+
+#include "stih407-clks.h"
+
+/* STiH410 introduces new clock outputs compared to STiH407 */
+
+/* CLOCKGEN C0 */
+#define CLK_TX_ICN_HADES 32
+#define CLK_RX_ICN_HADES 33
+#define CLK_ICN_REG_16 34
+#define CLK_PP_HADES 35
+#define CLK_CLUST_HADES 36
+#define CLK_HWPE_HADES 37
+#define CLK_FC_HADES 38
+
+/* CLOCKGEN D0 */
+#define CLK_PCMR10_MASTER 4
+#define CLK_USB2_PHY 5
+
+#endif