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authorFlorian Fainelli <florian@openwrt.org>2010-03-21 01:06:05 +0100
committerSamuel Ortiz <sameo@linux.intel.com>2010-05-28 01:37:28 +0200
commite090d506c3f1b314059fb77b177cd4193bb81d6e (patch)
tree65e589046da3de2ada51415ff3d1598c0dc81085 /include/linux/mfd
parentf322d5f0097333343bfd92b47258ee997c889263 (diff)
mfd: Add support for the RDC321x southbridge
This patch adds a new MFD driver for the RDC321x southbridge. This southbridge is always present in the RDC321x System-on-a-Chip and provides access to some GPIOs as well as a watchdog. Access to these two functions is done using the southbridge PCI device configuration space. Signed-off-by: Florian Fainelli <florian@openwrt.org> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
Diffstat (limited to 'include/linux/mfd')
-rw-r--r--include/linux/mfd/rdc321x.h26
1 files changed, 26 insertions, 0 deletions
diff --git a/include/linux/mfd/rdc321x.h b/include/linux/mfd/rdc321x.h
new file mode 100644
index 00000000000..4bdf19c8eed
--- /dev/null
+++ b/include/linux/mfd/rdc321x.h
@@ -0,0 +1,26 @@
+#ifndef __RDC321X_MFD_H
+#define __RDC321X_MFD_H
+
+#include <linux/types.h>
+#include <linux/pci.h>
+
+/* Offsets to be accessed in the southbridge PCI
+ * device configuration register */
+#define RDC321X_WDT_CTRL 0x44
+#define RDC321X_GPIO_CTRL_REG1 0x48
+#define RDC321X_GPIO_DATA_REG1 0x4c
+#define RDC321X_GPIO_CTRL_REG2 0x84
+#define RDC321X_GPIO_DATA_REG2 0x88
+
+#define RDC321X_MAX_GPIO 58
+
+struct rdc321x_gpio_pdata {
+ struct pci_dev *sb_pdev;
+ unsigned max_gpios;
+};
+
+struct rdc321x_wdt_pdata {
+ struct pci_dev *sb_pdev;
+};
+
+#endif /* __RDC321X_MFD_H */