Merge tag 'mmc-v3.20-1' of git://git.linaro.org/people/ulf.hansson/mmc

Pull MMC updates from Ulf Hansson:
 "MMC core:
   - Support for MMC power sequences.
   - SDIO function devicetree subnode parsing.
   - Refactor the hardware reset routines and enable it for SD cards.
   - Various code quality improvements, especially for slot-gpio.

  MMC host:
   - dw_mmc: Various fixes and cleanups.
   - dw_mmc: Convert to mmc_send_tuning().
   - moxart: Fix probe logic.
   - sdhci: Various fixes and cleanups
   - sdhci: Asynchronous request handling support.
   - sdhci-pxav3: Various fixes and cleanups.
   - sdhci-tegra: Fixes for T114, T124 and T132.
   - rtsx: Various fixes and cleanups.
   - rtsx: Support for SDIO.
   - sdhi/tmio: Refactor and cleanup of header files.
   - omap_hsmmc: Use slot-gpio and common MMC DT parser.
   - Make all hosts to deal with errors from mmc_of_parse().
   - sunxi: Various fixes and cleanups.
   - sdhci: Support for Fujitsu SDHCI controller f_sdh30"

* tag 'mmc-v3.20-1' of git://git.linaro.org/people/ulf.hansson/mmc: (117 commits)
  mmc: sdhci-s3c: solve problem with sleeping in atomic context
  mmc: pwrseq: add driver for emmc hardware reset
  mmc: moxart: fix probe logic
  mmc: core: Invoke mmc_pwrseq_post_power_on() prior MMC_POWER_ON state
  mmc: pwrseq_simple: Add optional reference clock support
  mmc: pwrseq: Document optional clock for the simple power sequence
  mmc: pwrseq_simple: Extend to support more pins
  mmc: pwrseq: Document that simple sequence support more than one GPIO
  mmc: Add hardware dependencies for sdhci-pxav3 and sdhci-pxav2
  mmc: sdhci-pxav3: Modify clock settings for the SDR50 and DDR50 modes
  mmc: sdhci-pxav3: Extend binding with SDIO3 conf reg for the Armada 38x
  mmc: sdhci-pxav3: Fix Armada 38x controller's caps according to erratum ERR-7878951
  mmc: sdhci-pxav3: Fix SDR50 and DDR50 capabilities for the Armada 38x flavor
  mmc: sdhci: switch voltage before sdhci_set_ios in runtime resume
  mmc: tegra: Write xfer_mode, CMD regs in together
  mmc: Resolve BKOPS compatability issue
  mmc: sdhci-pxav3: fix setting of pdata->clk_delay_cycles
  mmc: dw_mmc: rockchip: remove incorrect __exit_p()
  mmc: dw_mmc: exynos: remove incorrect __exit_p()
  mmc: Fix menuconfig alignment of MMC_SDHCI_* options
  ...

1 files changed, 10 insertions, 0 deletions

diff --git a/include/linux/mmc/sdhci.h b/include/linux/mmc/sdhci.h
index f767a0de611..c3e3db19673 100644
--- a/include/linux/mmc/sdhci.h
+++ b/include/linux/mmc/sdhci.h
@@ -17,6 +17,11 @@
 #include <linux/io.h>
 #include <linux/mmc/host.h>
 
+struct sdhci_host_next {
+	unsigned int	sg_count;
+	s32		cookie;
+};
+
 struct sdhci_host {
 	/* Data set by hardware interface driver */
 	const char *hw_name;	/* Hardware bus name */
@@ -106,6 +111,10 @@ struct sdhci_host {
 #define SDHCI_QUIRK2_CLEAR_TRANSFERMODE_REG_BEFORE_CMD	(1<<10)
 /* Capability register bit-63 indicates HS400 support */
 #define SDHCI_QUIRK2_CAPS_BIT63_FOR_HS400		(1<<11)
+/* forced tuned clock */
+#define SDHCI_QUIRK2_TUNING_WORK_AROUND			(1<<12)
+/* disable the block count for single block transactions */
+#define SDHCI_QUIRK2_SUPPORT_SINGLE			(1<<13)
 
 	int irq;		/* Device IRQ */
 	void __iomem *ioaddr;	/* Mapped address */
@@ -203,6 +212,7 @@ struct sdhci_host {
 #define SDHCI_TUNING_MODE_1	0
 	struct timer_list	tuning_timer;	/* Timer for tuning */
 
+	struct sdhci_host_next	next_data;
 	unsigned long private[0] ____cacheline_aligned;
 };
 #endif /* LINUX_MMC_SDHCI_H */