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authorJaehoon Chung <jh80.chung@samsung.com>2011-02-17 13:09:04 +0900
committerChris Ball <cjb@laptop.org>2011-03-15 13:49:28 -0400
commit37b7785e3ac5128809340eaeb791ca7a471c4e32 (patch)
treeff7744cb148e22cf36c3801eb00b7a2a2ee98567 /include/linux/mmc
parent449bdc2d9d62794246351d10dd4534a239bf06b6 (diff)
mmc: dw_mmc: modify quirks bit-shift control
If we need some quirks, maybe add quirks in future But now, quirks value set to integer..later we should be confused.. So I think that need bit-shift control. And If we need not any quirks, we didn't set anything.. (Need not DW_MCI_QUIRK_NONE) Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Acked-by: Will Newton <will.newton@imgtec.com> Signed-off-by: Chris Ball <cjb@laptop.org>
Diffstat (limited to 'include/linux/mmc')
-rw-r--r--include/linux/mmc/dw_mmc.h8
1 files changed, 3 insertions, 5 deletions
diff --git a/include/linux/mmc/dw_mmc.h b/include/linux/mmc/dw_mmc.h
index 16b0261763e..3f22c201ee3 100644
--- a/include/linux/mmc/dw_mmc.h
+++ b/include/linux/mmc/dw_mmc.h
@@ -165,14 +165,12 @@ struct dw_mci_dma_ops {
};
/* IP Quirks/flags. */
-/* No special quirks or flags to cater for */
-#define DW_MCI_QUIRK_NONE 0
/* DTO fix for command transmission with IDMAC configured */
-#define DW_MCI_QUIRK_IDMAC_DTO 1
+#define DW_MCI_QUIRK_IDMAC_DTO BIT(0)
/* delay needed between retries on some 2.11a implementations */
-#define DW_MCI_QUIRK_RETRY_DELAY 2
+#define DW_MCI_QUIRK_RETRY_DELAY BIT(1)
/* High Speed Capable - Supports HS cards (upto 50MHz) */
-#define DW_MCI_QUIRK_HIGHSPEED 4
+#define DW_MCI_QUIRK_HIGHSPEED BIT(2)
struct dma_pdata;