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authorSeth Heasley <seth.heasley@intel.com>2008-08-28 15:40:59 -0700
committerJesse Barnes <jbarnes@virtuousgeek.org>2008-10-20 10:53:48 -0700
commit37a84ec668ba251ae02cf2c2c664baf6b247ae1f (patch)
tree1cc937e4264fade2d790757b1f294d6e33479d2d /include/linux/pci_ids.h
parentf7a10e32a1a7ae240fa3925c5727d224eba3e31d (diff)
x86/PCI: irq and pci_ids patch for Intel Ibex Peak DeviceIDs
This patch updates the Intel Ibex Peak (PCH) LPC and SMBus Controller DeviceIDs. The LPC Controller ID is set by Firmware within the range of 0x3b00-3b1f. This range is included in pci_ids.h using min and max values, and irq.c now has code to handle the range (in lieu of 32 additions to a SWITCH statement). The SMBus Controller ID is a fixed-value and will not change. Signed-off-by: Seth Heasley <seth.heasley@intel.com> Acked-by: Jean Delvare <khali@linux-fr.org> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Diffstat (limited to 'include/linux/pci_ids.h')
-rw-r--r--include/linux/pci_ids.h6
1 files changed, 3 insertions, 3 deletions
diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h
index 8edddc240e4..e5d344bfcb7 100644
--- a/include/linux/pci_ids.h
+++ b/include/linux/pci_ids.h
@@ -2454,9 +2454,9 @@
#define PCI_DEVICE_ID_INTEL_ICH10_3 0x3a1a
#define PCI_DEVICE_ID_INTEL_ICH10_4 0x3a30
#define PCI_DEVICE_ID_INTEL_ICH10_5 0x3a60
-#define PCI_DEVICE_ID_INTEL_PCH_0 0x3b10
-#define PCI_DEVICE_ID_INTEL_PCH_1 0x3b11
-#define PCI_DEVICE_ID_INTEL_PCH_2 0x3b30
+#define PCI_DEVICE_ID_INTEL_PCH_LPC_MIN 0x3b00
+#define PCI_DEVICE_ID_INTEL_PCH_LPC_MAX 0x3b1f
+#define PCI_DEVICE_ID_INTEL_PCH_SMBUS 0x3b30
#define PCI_DEVICE_ID_INTEL_IOAT_SNB 0x402f
#define PCI_DEVICE_ID_INTEL_5100_16 0x65f0
#define PCI_DEVICE_ID_INTEL_5100_21 0x65f5