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authorBjorn Helgaas <bhelgaas@google.com>2012-07-10 08:36:09 -0600
committerBjorn Helgaas <bhelgaas@google.com>2012-07-10 08:36:09 -0600
commit6ee53f4c38e70ba34777ad38807a50c1812ff36f (patch)
tree8a4eeef5923d28c2e4ab14f4559e686cc1fce455 /include/linux/pci_regs.h
parentd68e70c6e59ad08feca291c2790164d3231c425e (diff)
parent1c975931128c1128892981095a64fb8eabf240eb (diff)
Merge branch 'pci/bjorn-p2p-bridge-windows' into next
* pci/bjorn-p2p-bridge-windows: sparc/PCI: replace pci_cfg_fake_ranges() with pci_read_bridge_bases() PCI: support sizing P2P bridge I/O windows with 1K granularity PCI: reimplement P2P bridge 1K I/O windows (Intel P64H2) PCI: allow P2P bridge windows starting at PCI bus address zero Conflicts: drivers/pci/probe.c include/linux/pci.h
Diffstat (limited to 'include/linux/pci_regs.h')
-rw-r--r--include/linux/pci_regs.h3
1 files changed, 2 insertions, 1 deletions
diff --git a/include/linux/pci_regs.h b/include/linux/pci_regs.h
index 80e8605b5f9..53274bff577 100644
--- a/include/linux/pci_regs.h
+++ b/include/linux/pci_regs.h
@@ -126,7 +126,8 @@
#define PCI_IO_RANGE_TYPE_MASK 0x0fUL /* I/O bridging type */
#define PCI_IO_RANGE_TYPE_16 0x00
#define PCI_IO_RANGE_TYPE_32 0x01
-#define PCI_IO_RANGE_MASK (~0x0fUL)
+#define PCI_IO_RANGE_MASK (~0x0fUL) /* Standard 4K I/O windows */
+#define PCI_IO_1K_RANGE_MASK (~0x03UL) /* Intel 1K I/O windows */
#define PCI_SEC_STATUS 0x1e /* Secondary status register, only bit 14 used */
#define PCI_MEMORY_BASE 0x20 /* Memory range behind */
#define PCI_MEMORY_LIMIT 0x22