summaryrefslogtreecommitdiffstats
path: root/include/linux/spi
diff options
context:
space:
mode:
authorLinus Torvalds <torvalds@linux-foundation.org>2012-05-22 15:53:59 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2012-05-22 15:53:59 -0700
commitfb2123fad3b499f0898835b19dbb93b18d27ee98 (patch)
tree7273754cded304f52dbbef86d23dda96e0a8452a /include/linux/spi
parenta481991467d38afb43c3921d5b5b59ccb61b04ba (diff)
parent991214386dee8a3cd9adc743778f472ac8a12bbc (diff)
Merge tag 'char-misc-3.5-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc
Pull Char/Misc patches from Greg Kroah-Hartman: "Here are a few various char/misc tree patches for the 3.5-rc1 merge window. Nothing major here at all, just different driver updates and some parport dead code removal. Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>" * tag 'char-misc-3.5-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: parport: remove unused dead code from lowlevel drivers xilinx_hwicap: reset XHI_MAX_RETRIES xilinx_hwicap: add support for virtex6 FPGAs Support M95040 SPI EEPROM misc: add support for bmp18x chips to the bmp085 driver misc: bmp085: add device tree properties misc: clean up bmp085 driver misc: do not mark exported functions __devexit misc: add missing __devexit_p() annotations pch_phub: delete duplicate definitions misc: Fix irq leak in max8997_muic_probe error path
Diffstat (limited to 'include/linux/spi')
-rw-r--r--include/linux/spi/eeprom.h10
1 files changed, 10 insertions, 0 deletions
diff --git a/include/linux/spi/eeprom.h b/include/linux/spi/eeprom.h
index 306e7b1c69e..403e007aef6 100644
--- a/include/linux/spi/eeprom.h
+++ b/include/linux/spi/eeprom.h
@@ -20,6 +20,16 @@ struct spi_eeprom {
#define EE_ADDR3 0x0004 /* 24 bit addrs */
#define EE_READONLY 0x0008 /* disallow writes */
+ /*
+ * Certain EEPROMS have a size that is larger than the number of address
+ * bytes would allow (e.g. like M95040 from ST that has 512 Byte size
+ * but uses only one address byte (A0 to A7) for addressing.) For
+ * the extra address bit (A8, A16 or A24) bit 3 of the instruction byte
+ * is used. This instruction bit is normally defined as don't care for
+ * other AT25 like chips.
+ */
+#define EE_INSTR_BIT3_IS_ADDR 0x0010
+
/* for exporting this chip's data to other kernel code */
void (*setup)(struct memory_accessor *mem, void *context);
void *context;