diff options
author | Rafał Miłecki <zajec5@gmail.com> | 2011-04-23 19:30:29 +0200 |
---|---|---|
committer | John W. Linville <linville@tuxdriver.com> | 2011-04-26 15:50:29 -0400 |
commit | 04ad1fb2640a4f23e99ccb705c179d64abac03f2 (patch) | |
tree | 7a2cf668c2f010dc61e072c68e82ee68b685c61a /include/linux/ssb/ssb_regs.h | |
parent | a6ef8143839a8640532ba473906beb1a38b03e29 (diff) |
ssb: update reject bit for Target State Low
My 14e4:4315 is SSB_IDLOW_SSBREV_26:
read32 0xfaafcff8 -> 0x600422d5
My 14e4:4328 is SSB_IDLOW_SSBREV_24:
read32 0xfaafcff8 -> 0x400422c5
My 14e4:432b is SSB_IDLOW_SSBREV_26 again:
read32 0xfaafcff8 -> 0x600422d5
For all of them wl driver is using 0x2 reject bit:
write32(0xf98) <- 0x00010002
So it seems SSB 2.3 is the exception using another bit.
Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'include/linux/ssb/ssb_regs.h')
-rw-r--r-- | include/linux/ssb/ssb_regs.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/include/linux/ssb/ssb_regs.h b/include/linux/ssb/ssb_regs.h index 402955ae48c..efbf459d571 100644 --- a/include/linux/ssb/ssb_regs.h +++ b/include/linux/ssb/ssb_regs.h @@ -97,7 +97,7 @@ #define SSB_INTVEC_ENET1 0x00000040 /* Enable interrupts for enet 1 */ #define SSB_TMSLOW 0x0F98 /* SB Target State Low */ #define SSB_TMSLOW_RESET 0x00000001 /* Reset */ -#define SSB_TMSLOW_REJECT_22 0x00000002 /* Reject (Backplane rev 2.2) */ +#define SSB_TMSLOW_REJECT 0x00000002 /* Reject (Standard Backplane) */ #define SSB_TMSLOW_REJECT_23 0x00000004 /* Reject (Backplane rev 2.3) */ #define SSB_TMSLOW_CLOCK 0x00010000 /* Clock Enable */ #define SSB_TMSLOW_FGC 0x00020000 /* Force Gated Clocks On */ |