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authorLinus Torvalds <torvalds@linux-foundation.org>2012-05-22 15:50:46 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2012-05-22 15:50:46 -0700
commita481991467d38afb43c3921d5b5b59ccb61b04ba (patch)
treea4b0b9a14da6fd5ef7b9b512bb32dbfcfcf2cd71 /include/linux/usb
parentf6a26ae7699416d86bea8cb68ce413571e9cab3c (diff)
parentcda4db53e9c28061c100400e1a4d273ea61dfba9 (diff)
Merge tag 'usb-3.5-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb
Pull USB 3.5-rc1 changes from Greg Kroah-Hartman: "Here is the big USB 3.5-rc1 pull request for the 3.5-rc1 merge window. It's touches a lot of different parts of the kernel, all USB drivers, due to some API cleanups (getting rid of the ancient err() macro) and some changes that are needed for USB 3.0 power management updates. There are also lots of new drivers, pimarily gadget, but others as well. We deleted a staging driver, which was nice, and finally dropped the obsolete usbfs code, which will make Al happy to never have to touch that again. There were some build errors in the tree that linux-next found a few days ago, but those were fixed by the most recent changes (all were due to us not building with CONFIG_PM disabled.) Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>" * tag 'usb-3.5-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb: (477 commits) xhci: Fix DIV_ROUND_UP compile error. xhci: Fix compile with CONFIG_USB_SUSPEND=n USB: Fix core compile with CONFIG_USB_SUSPEND=n brcm80211: Fix compile error for .disable_hub_initiated_lpm. Revert "USB: EHCI: work around bug in the Philips ISP1562 controller" MAINTAINERS: Add myself as maintainer to the USB PHY Layer USB: EHCI: fix command register configuration lost problem USB: Remove races in devio.c USB: ehci-platform: remove update_device USB: Disable hub-initiated LPM for comms devices. xhci: Add Intel U1/U2 timeout policy. xhci: Add infrastructure for host-specific LPM policies. USB: Add macros for interrupt endpoint types. xhci: Reserve one command for USB3 LPM disable. xhci: Some Evaluate Context commands must succeed. USB: Disable USB 3.0 LPM in critical sections. USB: Add support to enable/disable USB3 link states. USB: Allow drivers to disable hub-initiated LPM. USB: Calculate USB 3.0 exit latencies for LPM. USB: Refactor code to set LPM support flag. ... Conflicts: arch/arm/mach-exynos/mach-nuri.c arch/arm/mach-exynos/mach-universal_c210.c drivers/net/wireless/ath/ath6kl/usb.c
Diffstat (limited to 'include/linux/usb')
-rw-r--r--include/linux/usb/ch11.h2
-rw-r--r--include/linux/usb/ch9.h58
-rw-r--r--include/linux/usb/chipidea.h28
-rw-r--r--include/linux/usb/composite.h6
-rw-r--r--include/linux/usb/functionfs.h4
-rw-r--r--include/linux/usb/gpio_vbus.h2
-rw-r--r--include/linux/usb/hcd.h32
-rw-r--r--include/linux/usb/isp1301.h80
-rw-r--r--include/linux/usb/langwell_udc.h310
-rw-r--r--include/linux/usb/serial.h34
10 files changed, 209 insertions, 347 deletions
diff --git a/include/linux/usb/ch11.h b/include/linux/usb/ch11.h
index f1d26b6067f..b6c2863b2c9 100644
--- a/include/linux/usb/ch11.h
+++ b/include/linux/usb/ch11.h
@@ -76,6 +76,8 @@
#define USB_PORT_FEAT_C_BH_PORT_RESET 29
#define USB_PORT_FEAT_FORCE_LINKPM_ACCEPT 30
+#define USB_PORT_LPM_TIMEOUT(p) (((p) & 0xff) << 8)
+
/* USB 3.0 hub remote wake mask bits, see table 10-14 */
#define USB_PORT_FEAT_REMOTE_WAKE_CONNECT (1 << 8)
#define USB_PORT_FEAT_REMOTE_WAKE_DISCONNECT (1 << 9)
diff --git a/include/linux/usb/ch9.h b/include/linux/usb/ch9.h
index af21f311591..d1d732c2838 100644
--- a/include/linux/usb/ch9.h
+++ b/include/linux/usb/ch9.h
@@ -88,6 +88,8 @@
#define USB_REQ_GET_INTERFACE 0x0A
#define USB_REQ_SET_INTERFACE 0x0B
#define USB_REQ_SYNCH_FRAME 0x0C
+#define USB_REQ_SET_SEL 0x30
+#define USB_REQ_SET_ISOCH_DELAY 0x31
#define USB_REQ_SET_ENCRYPTION 0x0D /* Wireless USB */
#define USB_REQ_GET_ENCRYPTION 0x0E
@@ -390,6 +392,11 @@ struct usb_endpoint_descriptor {
#define USB_ENDPOINT_XFER_INT 3
#define USB_ENDPOINT_MAX_ADJUSTABLE 0x80
+/* The USB 3.0 spec redefines bits 5:4 of bmAttributes as interrupt ep type. */
+#define USB_ENDPOINT_INTRTYPE 0x30
+#define USB_ENDPOINT_INTR_PERIODIC (0 << 4)
+#define USB_ENDPOINT_INTR_NOTIFICATION (1 << 4)
+
#define USB_ENDPOINT_SYNCTYPE 0x0c
#define USB_ENDPOINT_SYNC_NONE (0 << 2)
#define USB_ENDPOINT_SYNC_ASYNC (1 << 2)
@@ -592,6 +599,12 @@ static inline int usb_endpoint_maxp(const struct usb_endpoint_descriptor *epd)
return __le16_to_cpu(epd->wMaxPacketSize);
}
+static inline int usb_endpoint_interrupt_type(
+ const struct usb_endpoint_descriptor *epd)
+{
+ return epd->bmAttributes & USB_ENDPOINT_INTRTYPE;
+}
+
/*-------------------------------------------------------------------------*/
/* USB_DT_SS_ENDPOINT_COMP: SuperSpeed Endpoint Companion descriptor */
@@ -933,6 +946,51 @@ enum usb_device_state {
*/
};
+enum usb3_link_state {
+ USB3_LPM_U0 = 0,
+ USB3_LPM_U1,
+ USB3_LPM_U2,
+ USB3_LPM_U3
+};
+
+/*
+ * A U1 timeout of 0x0 means the parent hub will reject any transitions to U1.
+ * 0xff means the parent hub will accept transitions to U1, but will not
+ * initiate a transition.
+ *
+ * A U1 timeout of 0x1 to 0x7F also causes the hub to initiate a transition to
+ * U1 after that many microseconds. Timeouts of 0x80 to 0xFE are reserved
+ * values.
+ *
+ * A U2 timeout of 0x0 means the parent hub will reject any transitions to U2.
+ * 0xff means the parent hub will accept transitions to U2, but will not
+ * initiate a transition.
+ *
+ * A U2 timeout of 0x1 to 0xFE also causes the hub to initiate a transition to
+ * U2 after N*256 microseconds. Therefore a U2 timeout value of 0x1 means a U2
+ * idle timer of 256 microseconds, 0x2 means 512 microseconds, 0xFE means
+ * 65.024ms.
+ */
+#define USB3_LPM_DISABLED 0x0
+#define USB3_LPM_U1_MAX_TIMEOUT 0x7F
+#define USB3_LPM_U2_MAX_TIMEOUT 0xFE
+#define USB3_LPM_DEVICE_INITIATED 0xFF
+
+struct usb_set_sel_req {
+ __u8 u1_sel;
+ __u8 u1_pel;
+ __le16 u2_sel;
+ __le16 u2_pel;
+} __attribute__ ((packed));
+
+/*
+ * The Set System Exit Latency control transfer provides one byte each for
+ * U1 SEL and U1 PEL, so the max exit latency is 0xFF. U2 SEL and U2 PEL each
+ * are two bytes long.
+ */
+#define USB3_LPM_MAX_U1_SEL_PEL 0xFF
+#define USB3_LPM_MAX_U2_SEL_PEL 0xFFFF
+
/*-------------------------------------------------------------------------*/
/*
diff --git a/include/linux/usb/chipidea.h b/include/linux/usb/chipidea.h
new file mode 100644
index 00000000000..edb90d6cfd1
--- /dev/null
+++ b/include/linux/usb/chipidea.h
@@ -0,0 +1,28 @@
+/*
+ * Platform data for the chipidea USB dual role controller
+ */
+
+#ifndef __LINUX_USB_CHIPIDEA_H
+#define __LINUX_USB_CHIPIDEA_H
+
+struct ci13xxx;
+struct ci13xxx_udc_driver {
+ const char *name;
+ /* offset of the capability registers */
+ uintptr_t capoffset;
+ unsigned power_budget;
+ unsigned long flags;
+#define CI13XXX_REGS_SHARED BIT(0)
+#define CI13XXX_REQUIRE_TRANSCEIVER BIT(1)
+#define CI13XXX_PULLUP_ON_VBUS BIT(2)
+#define CI13XXX_DISABLE_STREAMING BIT(3)
+
+#define CI13XXX_CONTROLLER_RESET_EVENT 0
+#define CI13XXX_CONTROLLER_STOPPED_EVENT 1
+ void (*notify_event) (struct ci13xxx *udc, unsigned event);
+};
+
+/* Default offset of capability registers */
+#define DEF_CAPOFFSET 0x100
+
+#endif
diff --git a/include/linux/usb/composite.h b/include/linux/usb/composite.h
index a316fba7351..9d8c3b63449 100644
--- a/include/linux/usb/composite.h
+++ b/include/linux/usb/composite.h
@@ -242,6 +242,9 @@ int usb_add_config(struct usb_composite_dev *,
struct usb_configuration *,
int (*)(struct usb_configuration *));
+void usb_remove_config(struct usb_composite_dev *,
+ struct usb_configuration *);
+
/**
* struct usb_composite_driver - groups configurations into a gadget
* @name: For diagnostics, identifies the driver.
@@ -250,6 +253,8 @@ int usb_add_config(struct usb_composite_dev *,
* @iManufacturer: Used as iManufacturer override if @dev->iManufacturer is
* not set. If NULL a default "<system> <release> with <udc>" value
* will be used.
+ * @iSerialNumber: Used as iSerialNumber override if @dev->iSerialNumber is
+ * not set.
* @dev: Template descriptor for the device, including default device
* identifiers.
* @strings: tables of strings, keyed by identifiers assigned during bind()
@@ -280,6 +285,7 @@ struct usb_composite_driver {
const char *name;
const char *iProduct;
const char *iManufacturer;
+ const char *iSerialNumber;
const struct usb_device_descriptor *dev;
struct usb_gadget_strings **strings;
enum usb_device_speed max_speed;
diff --git a/include/linux/usb/functionfs.h b/include/linux/usb/functionfs.h
index 7587ef934ba..a843d085136 100644
--- a/include/linux/usb/functionfs.h
+++ b/include/linux/usb/functionfs.h
@@ -190,8 +190,10 @@ static int functionfs_ready_callback(struct ffs_data *ffs)
__attribute__((warn_unused_result, nonnull));
static void functionfs_closed_callback(struct ffs_data *ffs)
__attribute__((nonnull));
-static int functionfs_check_dev_callback(const char *dev_name)
+static void *functionfs_acquire_dev_callback(const char *dev_name)
__attribute__((warn_unused_result, nonnull));
+static void functionfs_release_dev_callback(struct ffs_data *ffs_data)
+ __attribute__((nonnull));
#endif
diff --git a/include/linux/usb/gpio_vbus.h b/include/linux/usb/gpio_vbus.h
index d9f03ccc2d6..837bba604a0 100644
--- a/include/linux/usb/gpio_vbus.h
+++ b/include/linux/usb/gpio_vbus.h
@@ -17,6 +17,7 @@
* @gpio_pullup: optional D+ or D- pullup GPIO (else negative/invalid)
* @gpio_vbus_inverted: true if gpio_vbus is active low
* @gpio_pullup_inverted: true if gpio_pullup is active low
+ * @wakeup: configure gpio_vbus as a wake-up source
*
* The VBUS sensing GPIO should have a pulldown, which will normally be
* part of a resistor ladder turning a 4.0V-5.25V level on VBUS into a
@@ -27,4 +28,5 @@ struct gpio_vbus_mach_info {
int gpio_pullup;
bool gpio_vbus_inverted;
bool gpio_pullup_inverted;
+ bool wakeup;
};
diff --git a/include/linux/usb/hcd.h b/include/linux/usb/hcd.h
index d28cc78a38e..7f855d50cdf 100644
--- a/include/linux/usb/hcd.h
+++ b/include/linux/usb/hcd.h
@@ -344,6 +344,15 @@ struct hc_driver {
*/
int (*update_device)(struct usb_hcd *, struct usb_device *);
int (*set_usb2_hw_lpm)(struct usb_hcd *, struct usb_device *, int);
+ /* USB 3.0 Link Power Management */
+ /* Returns the USB3 hub-encoded value for the U1/U2 timeout. */
+ int (*enable_usb3_lpm_timeout)(struct usb_hcd *,
+ struct usb_device *, enum usb3_link_state state);
+ /* The xHCI host controller can still fail the command to
+ * disable the LPM timeouts, so this can return an error code.
+ */
+ int (*disable_usb3_lpm_timeout)(struct usb_hcd *,
+ struct usb_device *, enum usb3_link_state state);
};
extern int usb_hcd_link_urb_to_ep(struct usb_hcd *hcd, struct urb *urb);
@@ -584,29 +593,6 @@ static inline void usb_hcd_resume_root_hub(struct usb_hcd *hcd)
}
#endif /* CONFIG_USB_SUSPEND */
-
-/*
- * USB device fs stuff
- */
-
-#ifdef CONFIG_USB_DEVICEFS
-
-/*
- * these are expected to be called from the USB core/hub thread
- * with the kernel lock held
- */
-extern void usbfs_update_special(void);
-extern int usbfs_init(void);
-extern void usbfs_cleanup(void);
-
-#else /* CONFIG_USB_DEVICEFS */
-
-static inline void usbfs_update_special(void) {}
-static inline int usbfs_init(void) { return 0; }
-static inline void usbfs_cleanup(void) { }
-
-#endif /* CONFIG_USB_DEVICEFS */
-
/*-------------------------------------------------------------------------*/
#if defined(CONFIG_USB_MON) || defined(CONFIG_USB_MON_MODULE)
diff --git a/include/linux/usb/isp1301.h b/include/linux/usb/isp1301.h
new file mode 100644
index 00000000000..d3a851c28b6
--- /dev/null
+++ b/include/linux/usb/isp1301.h
@@ -0,0 +1,80 @@
+/*
+ * NXP ISP1301 USB transceiver driver
+ *
+ * Copyright (C) 2012 Roland Stigge <stigge@antcom.de>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#ifndef __LINUX_USB_ISP1301_H
+#define __LINUX_USB_ISP1301_H
+
+#include <linux/of.h>
+
+/* I2C Register definitions: */
+
+#define ISP1301_I2C_MODE_CONTROL_1 0x04 /* u8 read, set, +1 clear */
+
+#define MC1_SPEED_REG (1 << 0)
+#define MC1_SUSPEND_REG (1 << 1)
+#define MC1_DAT_SE0 (1 << 2)
+#define MC1_TRANSPARENT (1 << 3)
+#define MC1_BDIS_ACON_EN (1 << 4)
+#define MC1_OE_INT_EN (1 << 5)
+#define MC1_UART_EN (1 << 6)
+#define MC1_MASK 0x7f
+
+#define ISP1301_I2C_MODE_CONTROL_2 0x12 /* u8 read, set, +1 clear */
+
+#define MC2_GLOBAL_PWR_DN (1 << 0)
+#define MC2_SPD_SUSP_CTRL (1 << 1)
+#define MC2_BI_DI (1 << 2)
+#define MC2_TRANSP_BDIR0 (1 << 3)
+#define MC2_TRANSP_BDIR1 (1 << 4)
+#define MC2_AUDIO_EN (1 << 5)
+#define MC2_PSW_EN (1 << 6)
+#define MC2_EN2V7 (1 << 7)
+
+#define ISP1301_I2C_OTG_CONTROL_1 0x06 /* u8 read, set, +1 clear */
+
+#define OTG1_DP_PULLUP (1 << 0)
+#define OTG1_DM_PULLUP (1 << 1)
+#define OTG1_DP_PULLDOWN (1 << 2)
+#define OTG1_DM_PULLDOWN (1 << 3)
+#define OTG1_ID_PULLDOWN (1 << 4)
+#define OTG1_VBUS_DRV (1 << 5)
+#define OTG1_VBUS_DISCHRG (1 << 6)
+#define OTG1_VBUS_CHRG (1 << 7)
+
+#define ISP1301_I2C_OTG_CONTROL_2 0x10 /* u8 readonly */
+
+#define OTG_B_SESS_END (1 << 6)
+#define OTG_B_SESS_VLD (1 << 7)
+
+#define ISP1301_I2C_INTERRUPT_SOURCE 0x8
+#define ISP1301_I2C_INTERRUPT_LATCH 0xA
+#define ISP1301_I2C_INTERRUPT_FALLING 0xC
+#define ISP1301_I2C_INTERRUPT_RISING 0xE
+
+#define INT_VBUS_VLD (1 << 0)
+#define INT_SESS_VLD (1 << 1)
+#define INT_DP_HI (1 << 2)
+#define INT_ID_GND (1 << 3)
+#define INT_DM_HI (1 << 4)
+#define INT_ID_FLOAT (1 << 5)
+#define INT_BDIS_ACON (1 << 6)
+#define INT_CR_INT (1 << 7)
+
+#define ISP1301_I2C_REG_CLEAR_ADDR 1 /* Register Address Modifier */
+
+struct i2c_client *isp1301_get_client(struct device_node *node);
+
+#endif /* __LINUX_USB_ISP1301_H */
diff --git a/include/linux/usb/langwell_udc.h b/include/linux/usb/langwell_udc.h
deleted file mode 100644
index 2d2d1bbad9d..00000000000
--- a/include/linux/usb/langwell_udc.h
+++ /dev/null
@@ -1,310 +0,0 @@
-/*
- * Intel Langwell USB Device Controller driver
- * Copyright (C) 2008-2009, Intel Corporation.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms and conditions of the GNU General Public License,
- * version 2, as published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
- * more details.
- *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
- *
- */
-
-#ifndef __LANGWELL_UDC_H
-#define __LANGWELL_UDC_H
-
-
-/* MACRO defines */
-#define CAP_REG_OFFSET 0x0
-#define OP_REG_OFFSET 0x28
-
-#define DMA_ADDR_INVALID (~(dma_addr_t)0)
-
-#define DQH_ALIGNMENT 2048
-#define DTD_ALIGNMENT 64
-#define DMA_BOUNDARY 4096
-
-#define EP0_MAX_PKT_SIZE 64
-#define EP_DIR_IN 1
-#define EP_DIR_OUT 0
-
-#define FLUSH_TIMEOUT 1000
-#define RESET_TIMEOUT 1000
-#define SETUPSTAT_TIMEOUT 100
-#define PRIME_TIMEOUT 100
-
-
-/* device memory space registers */
-
-/* Capability Registers, BAR0 + CAP_REG_OFFSET */
-struct langwell_cap_regs {
- /* offset: 0x0 */
- u8 caplength; /* offset of Operational Register */
- u8 _reserved3;
- u16 hciversion; /* H: BCD encoding of host version */
- u32 hcsparams; /* H: host port steering logic capability */
- u32 hccparams; /* H: host multiple mode control capability */
-#define HCC_LEN BIT(17) /* Link power management (LPM) capability */
- u8 _reserved4[0x20-0xc];
- /* offset: 0x20 */
- u16 dciversion; /* BCD encoding of device version */
- u8 _reserved5[0x24-0x22];
- u32 dccparams; /* overall device controller capability */
-#define HOSTCAP BIT(8) /* host capable */
-#define DEVCAP BIT(7) /* device capable */
-#define DEN(d) \
- (((d)>>0)&0x1f) /* bits 4:0, device endpoint number */
-} __attribute__ ((packed));
-
-
-/* Operational Registers, BAR0 + OP_REG_OFFSET */
-struct langwell_op_regs {
- /* offset: 0x28 */
- u32 extsts;
-#define EXTS_TI1 BIT(4) /* general purpose timer interrupt 1 */
-#define EXTS_TI1TI0 BIT(3) /* general purpose timer interrupt 0 */
-#define EXTS_TI1UPI BIT(2) /* USB host periodic interrupt */
-#define EXTS_TI1UAI BIT(1) /* USB host asynchronous interrupt */
-#define EXTS_TI1NAKI BIT(0) /* NAK interrupt */
- u32 extintr;
-#define EXTI_TIE1 BIT(4) /* general purpose timer interrupt enable 1 */
-#define EXTI_TIE0 BIT(3) /* general purpose timer interrupt enable 0 */
-#define EXTI_UPIE BIT(2) /* USB host periodic interrupt enable */
-#define EXTI_UAIE BIT(1) /* USB host asynchronous interrupt enable */
-#define EXTI_NAKE BIT(0) /* NAK interrupt enable */
- /* offset: 0x30 */
- u32 usbcmd;
-#define CMD_HIRD(u) \
- (((u)>>24)&0xf) /* bits 27:24, host init resume duration */
-#define CMD_ITC(u) \
- (((u)>>16)&0xff) /* bits 23:16, interrupt threshold control */
-#define CMD_PPE BIT(15) /* per-port change events enable */
-#define CMD_ATDTW BIT(14) /* add dTD tripwire */
-#define CMD_SUTW BIT(13) /* setup tripwire */
-#define CMD_ASPE BIT(11) /* asynchronous schedule park mode enable */
-#define CMD_FS2 BIT(10) /* frame list size */
-#define CMD_ASP1 BIT(9) /* asynchronous schedule park mode count */
-#define CMD_ASP0 BIT(8)
-#define CMD_LR BIT(7) /* light host/device controller reset */
-#define CMD_IAA BIT(6) /* interrupt on async advance doorbell */
-#define CMD_ASE BIT(5) /* asynchronous schedule enable */
-#define CMD_PSE BIT(4) /* periodic schedule enable */
-#define CMD_FS1 BIT(3)
-#define CMD_FS0 BIT(2)
-#define CMD_RST BIT(1) /* controller reset */
-#define CMD_RUNSTOP BIT(0) /* run/stop */
- u32 usbsts;
-#define STS_PPCI(u) \
- (((u)>>16)&0xffff) /* bits 31:16, port-n change detect */
-#define STS_AS BIT(15) /* asynchronous schedule status */
-#define STS_PS BIT(14) /* periodic schedule status */
-#define STS_RCL BIT(13) /* reclamation */
-#define STS_HCH BIT(12) /* HC halted */
-#define STS_ULPII BIT(10) /* ULPI interrupt */
-#define STS_SLI BIT(8) /* DC suspend */
-#define STS_SRI BIT(7) /* SOF received */
-#define STS_URI BIT(6) /* USB reset received */
-#define STS_AAI BIT(5) /* interrupt on async advance */
-#define STS_SEI BIT(4) /* system error */
-#define STS_FRI BIT(3) /* frame list rollover */
-#define STS_PCI BIT(2) /* port change detect */
-#define STS_UEI BIT(1) /* USB error interrupt */
-#define STS_UI BIT(0) /* USB interrupt */
- u32 usbintr;
-/* bits 31:16, per-port interrupt enable */
-#define INTR_PPCE(u) (((u)>>16)&0xffff)
-#define INTR_ULPIE BIT(10) /* ULPI enable */
-#define INTR_SLE BIT(8) /* DC sleep/suspend enable */
-#define INTR_SRE BIT(7) /* SOF received enable */
-#define INTR_URE BIT(6) /* USB reset enable */
-#define INTR_AAE BIT(5) /* interrupt on async advance enable */
-#define INTR_SEE BIT(4) /* system error enable */
-#define INTR_FRE BIT(3) /* frame list rollover enable */
-#define INTR_PCE BIT(2) /* port change detect enable */
-#define INTR_UEE BIT(1) /* USB error interrupt enable */
-#define INTR_UE BIT(0) /* USB interrupt enable */
- u32 frindex; /* frame index */
-#define FRINDEX_MASK (0x3fff << 0)
- u32 ctrldssegment; /* not used */
- u32 deviceaddr;
-#define USBADR_SHIFT 25
-#define USBADR(d) \
- (((d)>>25)&0x7f) /* bits 31:25, device address */
-#define USBADR_MASK (0x7f << 25)
-#define USBADRA BIT(24) /* device address advance */
- u32 endpointlistaddr;/* endpoint list top memory address */
-/* bits 31:11, endpoint list pointer */
-#define EPBASE(d) (((d)>>11)&0x1fffff)
-#define ENDPOINTLISTADDR_MASK (0x1fffff << 11)
- u32 ttctrl; /* H: TT operatin, not used */
- /* offset: 0x50 */
- u32 burstsize; /* burst size of data movement */
-#define TXPBURST(b) \
- (((b)>>8)&0xff) /* bits 15:8, TX burst length */
-#define RXPBURST(b) \
- (((b)>>0)&0xff) /* bits 7:0, RX burst length */
- u32 txfilltuning; /* TX tuning */
- u32 txttfilltuning; /* H: TX TT tuning */
- u32 ic_usb; /* control the IC_USB FS/LS transceiver */
- /* offset: 0x60 */
- u32 ulpi_viewport; /* indirect access to ULPI PHY */
-#define ULPIWU BIT(31) /* ULPI wakeup */
-#define ULPIRUN BIT(30) /* ULPI read/write run */
-#define ULPIRW BIT(29) /* ULPI read/write control */
-#define ULPISS BIT(27) /* ULPI sync state */
-#define ULPIPORT(u) \
- (((u)>>24)&7) /* bits 26:24, ULPI port number */
-#define ULPIADDR(u) \
- (((u)>>16)&0xff) /* bits 23:16, ULPI data address */
-#define ULPIDATRD(u) \
- (((u)>>8)&0xff) /* bits 15:8, ULPI data read */
-#define ULPIDATWR(u) \
- (((u)>>0)&0xff) /* bits 7:0, ULPI date write */
- u8 _reserved6[0x70-0x64];
- /* offset: 0x70 */
- u32 configflag; /* H: not used */
- u32 portsc1; /* port status */
-#define DA(p) \
- (((p)>>25)&0x7f) /* bits 31:25, device address */
-#define PORTS_SSTS (BIT(24) | BIT(23)) /* suspend status */
-#define PORTS_WKOC BIT(22) /* wake on over-current enable */
-#define PORTS_WKDS BIT(21) /* wake on disconnect enable */
-#define PORTS_WKCN BIT(20) /* wake on connect enable */
-#define PORTS_PTC(p) (((p)>>16)&0xf) /* bits 19:16, port test control */
-#define PORTS_PIC (BIT(15) | BIT(14)) /* port indicator control */
-#define PORTS_PO BIT(13) /* port owner */
-#define PORTS_PP BIT(12) /* port power */
-#define PORTS_LS (BIT(11) | BIT(10)) /* line status */
-#define PORTS_SLP BIT(9) /* suspend using L1 */
-#define PORTS_PR BIT(8) /* port reset */
-#define PORTS_SUSP BIT(7) /* suspend */
-#define PORTS_FPR BIT(6) /* force port resume */
-#define PORTS_OCC BIT(5) /* over-current change */
-#define PORTS_OCA BIT(4) /* over-current active */
-#define PORTS_PEC BIT(3) /* port enable/disable change */
-#define PORTS_PE BIT(2) /* port enable/disable */
-#define PORTS_CSC BIT(1) /* connect status change */
-#define PORTS_CCS BIT(0) /* current connect status */
- u8 _reserved7[0xb4-0x78];
- /* offset: 0xb4 */
- u32 devlc; /* control LPM and each USB port behavior */
-/* bits 31:29, parallel transceiver select */
-#define LPM_PTS(d) (((d)>>29)&7)
-#define LPM_STS BIT(28) /* serial transceiver select */
-#define LPM_PTW BIT(27) /* parallel transceiver width */
-#define LPM_PSPD(d) (((d)>>25)&3) /* bits 26:25, port speed */
-#define LPM_PSPD_MASK (BIT(26) | BIT(25))
-#define LPM_SPEED_FULL 0
-#define LPM_SPEED_LOW 1
-#define LPM_SPEED_HIGH 2
-#define LPM_SRT BIT(24) /* shorten reset time */
-#define LPM_PFSC BIT(23) /* port force full speed connect */
-#define LPM_PHCD BIT(22) /* PHY low power suspend clock disable */
-#define LPM_STL BIT(16) /* STALL reply to LPM token */
-#define LPM_BA(d) \
- (((d)>>1)&0x7ff) /* bits 11:1, BmAttributes */
-#define LPM_NYT_ACK BIT(0) /* NYET/ACK reply to LPM token */
- u8 _reserved8[0xf4-0xb8];
- /* offset: 0xf4 */
- u32 otgsc; /* On-The-Go status and control */
-#define OTGSC_DPIE BIT(30) /* data pulse interrupt enable */
-#define OTGSC_MSE BIT(29) /* 1 ms timer interrupt enable */
-#define OTGSC_BSEIE BIT(28) /* B session end interrupt enable */
-#define OTGSC_BSVIE BIT(27) /* B session valid interrupt enable */
-#define OTGSC_ASVIE BIT(26) /* A session valid interrupt enable */
-#define OTGSC_AVVIE BIT(25) /* A VBUS valid interrupt enable */
-#define OTGSC_IDIE BIT(24) /* USB ID interrupt enable */
-#define OTGSC_DPIS BIT(22) /* data pulse interrupt status */
-#define OTGSC_MSS BIT(21) /* 1 ms timer interrupt status */
-#define OTGSC_BSEIS BIT(20) /* B session end interrupt status */
-#define OTGSC_BSVIS BIT(19) /* B session valid interrupt status */
-#define OTGSC_ASVIS BIT(18) /* A session valid interrupt status */
-#define OTGSC_AVVIS BIT(17) /* A VBUS valid interrupt status */
-#define OTGSC_IDIS BIT(16) /* USB ID interrupt status */
-#define OTGSC_DPS BIT(14) /* data bus pulsing status */
-#define OTGSC_MST BIT(13) /* 1 ms timer toggle */
-#define OTGSC_BSE BIT(12) /* B session end */
-#define OTGSC_BSV BIT(11) /* B session valid */
-#define OTGSC_ASV BIT(10) /* A session valid */
-#define OTGSC_AVV BIT(9) /* A VBUS valid */
-#define OTGSC_USBID BIT(8) /* USB ID */
-#define OTGSC_HABA BIT(7) /* hw assist B-disconnect to A-connect */
-#define OTGSC_HADP BIT(6) /* hw assist data pulse */
-#define OTGSC_IDPU BIT(5) /* ID pullup */
-#define OTGSC_DP BIT(4) /* data pulsing */
-#define OTGSC_OT BIT(3) /* OTG termination */
-#define OTGSC_HAAR BIT(2) /* hw assist auto reset */
-#define OTGSC_VC BIT(1) /* VBUS charge */
-#define OTGSC_VD BIT(0) /* VBUS discharge */
- u32 usbmode;
-#define MODE_VBPS BIT(5) /* R/W VBUS power select */
-#define MODE_SDIS BIT(4) /* R/W stream disable mode */
-#define MODE_SLOM BIT(3) /* R/W setup lockout mode */
-#define MODE_ENSE BIT(2) /* endian select */
-#define MODE_CM(u) (((u)>>0)&3) /* bits 1:0, controller mode */
-#define MODE_IDLE 0
-#define MODE_DEVICE 2
-#define MODE_HOST 3
- u8 _reserved9[0x100-0xfc];
- /* offset: 0x100 */
- u32 endptnak;
-#define EPTN(e) \
- (((e)>>16)&0xffff) /* bits 31:16, TX endpoint NAK */
-#define EPRN(e) \
- (((e)>>0)&0xffff) /* bits 15:0, RX endpoint NAK */
- u32 endptnaken;
-#define EPTNE(e) \
- (((e)>>16)&0xffff) /* bits 31:16, TX endpoint NAK enable */
-#define EPRNE(e) \
- (((e)>>0)&0xffff) /* bits 15:0, RX endpoint NAK enable */
- u32 endptsetupstat;
-#define SETUPSTAT_MASK (0xffff << 0) /* bits 15:0 */
-#define EP0SETUPSTAT_MASK 1
- u32 endptprime;
-/* bits 31:16, prime endpoint transmit buffer */
-#define PETB(e) (((e)>>16)&0xffff)
-/* bits 15:0, prime endpoint receive buffer */
-#define PERB(e) (((e)>>0)&0xffff)
- /* offset: 0x110 */
- u32 endptflush;
-/* bits 31:16, flush endpoint transmit buffer */
-#define FETB(e) (((e)>>16)&0xffff)
-/* bits 15:0, flush endpoint receive buffer */
-#define FERB(e) (((e)>>0)&0xffff)
- u32 endptstat;
-/* bits 31:16, endpoint transmit buffer ready */
-#define ETBR(e) (((e)>>16)&0xffff)
-/* bits 15:0, endpoint receive buffer ready */
-#define ERBR(e) (((e)>>0)&0xffff)
- u32 endptcomplete;
-/* bits 31:16, endpoint transmit complete event */
-#define ETCE(e) (((e)>>16)&0xffff)
-/* bits 15:0, endpoint receive complete event */
-#define ERCE(e) (((e)>>0)&0xffff)
- /* offset: 0x11c */
- u32 endptctrl[16];
-#define EPCTRL_TXE BIT(23) /* TX endpoint enable */
-#define EPCTRL_TXR BIT(22) /* TX data toggle reset */
-#define EPCTRL_TXI BIT(21) /* TX data toggle inhibit */
-#define EPCTRL_TXT(e) (((e)>>18)&3) /* bits 19:18, TX endpoint type */
-#define EPCTRL_TXT_SHIFT 18
-#define EPCTRL_TXD BIT(17) /* TX endpoint data source */
-#define EPCTRL_TXS BIT(16) /* TX endpoint STALL */
-#define EPCTRL_RXE BIT(7) /* RX endpoint enable */
-#define EPCTRL_RXR BIT(6) /* RX data toggle reset */
-#define EPCTRL_RXI BIT(5) /* RX data toggle inhibit */
-#define EPCTRL_RXT(e) (((e)>>2)&3) /* bits 3:2, RX endpoint type */
-#define EPCTRL_RXT_SHIFT 2 /* bits 19:18, TX endpoint type */
-#define EPCTRL_RXD BIT(1) /* RX endpoint data sink */
-#define EPCTRL_RXS BIT(0) /* RX endpoint STALL */
-} __attribute__ ((packed));
-
-#endif /* __LANGWELL_UDC_H */
-
diff --git a/include/linux/usb/serial.h b/include/linux/usb/serial.h
index 47428388823..86c0b451745 100644
--- a/include/linux/usb/serial.h
+++ b/include/linux/usb/serial.h
@@ -1,7 +1,7 @@
/*
* USB Serial Converter stuff
*
- * Copyright (C) 1999 - 2005
+ * Copyright (C) 1999 - 2012
* Greg Kroah-Hartman (greg@kroah.com)
*
* This program is free software; you can redistribute it and/or modify
@@ -249,6 +249,7 @@ struct usb_serial_driver {
int (*suspend)(struct usb_serial *serial, pm_message_t message);
int (*resume)(struct usb_serial *serial);
+ int (*reset_resume)(struct usb_serial *serial);
/* serial function calls */
/* Called by console and by the tty layer */
@@ -292,16 +293,11 @@ struct usb_serial_driver {
#define to_usb_serial_driver(d) \
container_of(d, struct usb_serial_driver, driver)
-extern int usb_serial_register_drivers(struct usb_driver *udriver,
- struct usb_serial_driver * const serial_drivers[]);
-extern void usb_serial_deregister_drivers(struct usb_driver *udriver,
- struct usb_serial_driver * const serial_drivers[]);
+extern int usb_serial_register_drivers(struct usb_serial_driver *const serial_drivers[],
+ const char *name, const struct usb_device_id *id_table);
+extern void usb_serial_deregister_drivers(struct usb_serial_driver *const serial_drivers[]);
extern void usb_serial_port_softint(struct usb_serial_port *port);
-extern int usb_serial_probe(struct usb_interface *iface,
- const struct usb_device_id *id);
-extern void usb_serial_disconnect(struct usb_interface *iface);
-
extern int usb_serial_suspend(struct usb_interface *intf, pm_message_t message);
extern int usb_serial_resume(struct usb_interface *intf);
@@ -400,8 +396,8 @@ do { \
/*
* module_usb_serial_driver() - Helper macro for registering a USB Serial driver
- * @__usb_driver: usb_driver struct to register
* @__serial_drivers: list of usb_serial drivers to register
+ * @__ids: all device ids that @__serial_drivers bind to
*
* Helper macro for USB serial drivers which do not do anything special
* in module init/exit. This eliminates a lot of boilerplate. Each
@@ -409,9 +405,21 @@ do { \
* module_init() and module_exit()
*
*/
-#define module_usb_serial_driver(__usb_driver, __serial_drivers) \
- module_driver(__usb_driver, usb_serial_register_drivers, \
- usb_serial_deregister_drivers, __serial_drivers)
+#define usb_serial_module_driver(__name, __serial_drivers, __ids) \
+static int __init usb_serial_module_init(void) \
+{ \
+ return usb_serial_register_drivers(__serial_drivers, \
+ __name, __ids); \
+} \
+module_init(usb_serial_module_init); \
+static void __exit usb_serial_module_exit(void) \
+{ \
+ usb_serial_deregister_drivers(__serial_drivers); \
+} \
+module_exit(usb_serial_module_exit);
+
+#define module_usb_serial_driver(__serial_drivers, __ids) \
+ usb_serial_module_driver(KBUILD_MODNAME, __serial_drivers, __ids)
#endif /* __LINUX_USB_SERIAL_H */