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authorMoiz Sonasath <m-sonasath@ti.com>2010-02-16 18:57:21 -0600
committerSamuel Ortiz <sameo@linux.intel.com>2010-03-07 22:17:23 +0100
commita29aaf55cd6faa75e35abfe00bd3ffc537490485 (patch)
tree8f883a25bb154df5bff43a3980752a973da99a10 /include/linux
parente82c60ae7d3a7f19c4b9b3e7bd6ea298fa5efe93 (diff)
mfd: Disable TWL4030/5030 I2C1/I2C4 internal pull-ups
This patch disables TWL4030/5030 I2C1 adn I2C4(SR) internal pull-up, to use only the external HW resistor >=470 Ohm for the assured functionality in HS mode. While testing the I2C in High Speed mode, it was discovered that without a proper pull-up resistor, there is data corruption during multi-byte transfer. RTC(time_set) test case was used for testing. From the analysis done, it was concluded that ideally we need a pull-up of 1.6k Ohm(recomended) or atleast 470 Ohm or greater for assured performance in HS mode. Signed-off-by: Moiz Sonasath <m-sonasath@ti.com> Signed-off-by: Allen Pais <allen.pais@ti.com> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
Diffstat (limited to 'include/linux')
-rw-r--r--include/linux/i2c/twl.h15
1 files changed, 15 insertions, 0 deletions
diff --git a/include/linux/i2c/twl.h b/include/linux/i2c/twl.h
index 9733e9e53f2..e28d4c0e45b 100644
--- a/include/linux/i2c/twl.h
+++ b/include/linux/i2c/twl.h
@@ -239,6 +239,21 @@ int twl6030_interrupt_mask(u8 bit_mask, u8 offset);
/*----------------------------------------------------------------------*/
+/*Interface Bit Register (INTBR) offsets
+ *(Use TWL_4030_MODULE_INTBR)
+ */
+
+#define REG_GPPUPDCTR1 0x0F
+
+/*I2C1 and I2C4(SR) SDA/SCL pull-up control bits */
+
+#define I2C_SCL_CTRL_PU BIT(0)
+#define I2C_SDA_CTRL_PU BIT(2)
+#define SR_I2C_SCL_CTRL_PU BIT(4)
+#define SR_I2C_SDA_CTRL_PU BIT(6)
+
+/*----------------------------------------------------------------------*/
+
/*
* Keypad register offsets (use TWL4030_MODULE_KEYPAD)
* ... SIH/interrupt only