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authorGreg Kroah-Hartman <gregkh@linuxfoundation.org>2013-08-05 14:04:24 +0800
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2013-08-05 14:04:24 +0800
commitcefe8a32f2a5887246ed250115e34bee6ecc8d61 (patch)
tree1e8220456df31a05c6c56889545f2d8360f5a7b9 /include/linux
parent02073798a6b081bf74e6c10d6f7e7a693c067ecd (diff)
parentb1451e546899bc8f450773b2af02e0cd000cf1fa (diff)
Merge tag 'iio-fixes-for-3.11b' of git://git.kernel.org/pub/scm/linux/kernel/git/jic23/iio into staging-linus
Jonathan writes: Second round of IIO fixes for the 3.11 cycle. 1) Fix a long term race in the IIO trigger handling. This only effects cases where a single trigger is in use by multiple devices. 2) ti_am335x fix an issue with incorrect data due to reading before the sequencer is finished.
Diffstat (limited to 'include/linux')
-rw-r--r--include/linux/iio/trigger.h3
-rw-r--r--include/linux/mfd/ti_am335x_tscadc.h16
2 files changed, 18 insertions, 1 deletions
diff --git a/include/linux/iio/trigger.h b/include/linux/iio/trigger.h
index 3869c525b05..369cf2cd514 100644
--- a/include/linux/iio/trigger.h
+++ b/include/linux/iio/trigger.h
@@ -8,6 +8,7 @@
*/
#include <linux/irq.h>
#include <linux/module.h>
+#include <linux/atomic.h>
#ifndef _IIO_TRIGGER_H_
#define _IIO_TRIGGER_H_
@@ -61,7 +62,7 @@ struct iio_trigger {
struct list_head list;
struct list_head alloc_list;
- int use_count;
+ atomic_t use_count;
struct irq_chip subirq_chip;
int subirq_base;
diff --git a/include/linux/mfd/ti_am335x_tscadc.h b/include/linux/mfd/ti_am335x_tscadc.h
index 8d73fe29796..db1791bb997 100644
--- a/include/linux/mfd/ti_am335x_tscadc.h
+++ b/include/linux/mfd/ti_am335x_tscadc.h
@@ -113,11 +113,27 @@
#define CNTRLREG_8WIRE CNTRLREG_AFE_CTRL(3)
#define CNTRLREG_TSCENB BIT(7)
+/* FIFO READ Register */
+#define FIFOREAD_DATA_MASK (0xfff << 0)
+#define FIFOREAD_CHNLID_MASK (0xf << 16)
+
+/* Sequencer Status */
+#define SEQ_STATUS BIT(5)
+
#define ADC_CLK 3000000
#define MAX_CLK_DIV 7
#define TOTAL_STEPS 16
#define TOTAL_CHANNELS 8
+/*
+* ADC runs at 3MHz, and it takes
+* 15 cycles to latch one data output.
+* Hence the idle time for ADC to
+* process one sample data would be
+* around 5 micro seconds.
+*/
+#define IDLE_TIMEOUT 5 /* microsec */
+
#define TSCADC_CELLS 2
struct ti_tscadc_dev {