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authorArchit Taneja <archit@ti.com>2012-06-26 12:38:31 +0530
committerTomi Valkeinen <tomi.valkeinen@ti.com>2012-06-29 10:15:54 +0300
commitbd5a7b11a0bfd172b4cd6ef3e01e6beb1753c3f1 (patch)
treecd5114edfeb1f1dd4ae30f886f176236c5e5eb84 /include/video
parentcc937e5e4bcf6c97746384e5c07dd2b2c45898b3 (diff)
OMAPDSS: DSI: Fix HSYNC, VSYNC and DE polarities between DISPC and DSI
For DSI operation in videomode, DISPC logic levels for the signals HSYNC, VSYNC and DE need to be specified to DSI via the fields VP_HSYNC_POL, VP_VSYNC_POL and VP_DE_POL in DSI_CTRL registers. This information is completely internal to DSS as logic levels for the above signals hold no meaning on the DSI bus. Hence a DSI panel driver should be totally oblivious of these fields. Fix the logic levels/polarities in the DISPC and DSI registers to a default value. This is done by overriding these fields in omap_video_timings struct filled by the panel driver for DISPC, and use the equivalent default values when programming DSI_CTRL registers. Also, remove the redundant polarity related fields in omap_dss_dsi_videomode_data. Signed-off-by: Archit Taneja <archit@ti.com>
Diffstat (limited to 'include/video')
-rw-r--r--include/video/omapdss.h3
1 files changed, 0 insertions, 3 deletions
diff --git a/include/video/omapdss.h b/include/video/omapdss.h
index d8ab94485c9..a6267a2d292 100644
--- a/include/video/omapdss.h
+++ b/include/video/omapdss.h
@@ -261,9 +261,6 @@ struct omap_dss_dsi_videomode_data {
int hfp_blanking_mode;
/* Video port sync events */
- int vp_de_pol;
- int vp_hsync_pol;
- int vp_vsync_pol;
bool vp_vsync_end;
bool vp_hsync_end;