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authorThomas Gleixner <tglx@linutronix.de>2012-07-13 19:29:45 +0200
committerThomas Gleixner <tglx@linutronix.de>2012-07-25 12:46:38 +0200
commitdc9b229a58dc0dfed34272ff26c6d5fd17c674e0 (patch)
tree722795c29e6037d971e76d52d607d7a70cbbefaf /include
parente2b34e311be3a57c9abcb927e37a57e38913714c (diff)
genirq: Allow irq chips to mark themself oneshot safe
Some interrupt chips like MSI are oneshot safe by implementation. For those interrupts we can avoid the mask/unmask sequence for threaded interrupt handlers. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Link: http://lkml.kernel.org/r/alpine.LFD.2.02.1207132056540.32033@ionos Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Avi Kivity <avi@redhat.com> Cc: Marcelo Tosatti <mtosatti@redhat.com> Cc: Jan Kiszka <jan.kiszka@web.de>
Diffstat (limited to 'include')
-rw-r--r--include/linux/irq.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/include/linux/irq.h b/include/linux/irq.h
index 553fb66da13..216b0ba109d 100644
--- a/include/linux/irq.h
+++ b/include/linux/irq.h
@@ -349,6 +349,7 @@ enum {
IRQCHIP_MASK_ON_SUSPEND = (1 << 2),
IRQCHIP_ONOFFLINE_ENABLED = (1 << 3),
IRQCHIP_SKIP_SET_WAKE = (1 << 4),
+ IRQCHIP_ONESHOT_SAFE = (1 << 5),
};
/* This include will go away once we isolated irq_desc usage to core code */