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authorYong Wang <yong.y.wang@linux.intel.com>2010-07-30 16:23:03 +0800
committerDan Williams <dan.j.williams@intel.com>2010-08-04 14:12:05 -0700
commit0c42bd0e425e9c8ddb7019fc446f7d915e36c5f6 (patch)
tree8d89f7b5907bed52847451ab37619e9516ed7c3c /include
parentb3c567e474b5ba4447b6e16063a3b0cffc22d205 (diff)
dmaengine: Driver for Topcliff PCH DMA controller
Topcliff PCH is the platform controller hub that is going to be used in Intel's upcoming general embedded platforms. This adds the driver for Topcliff PCH DMA controller. The DMA channels are strictly for device to host or host to device transfers and cannot be used for generic memcpy. Signed-off-by: Yong Wang <yong.y.wang@intel.com> [kill GFP_ATOMIC, kill __raw_{read|write}l, locking fixlet] Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Diffstat (limited to 'include')
-rw-r--r--include/linux/pch_dma.h37
1 files changed, 37 insertions, 0 deletions
diff --git a/include/linux/pch_dma.h b/include/linux/pch_dma.h
new file mode 100644
index 00000000000..fdafe529ef8
--- /dev/null
+++ b/include/linux/pch_dma.h
@@ -0,0 +1,37 @@
+/*
+ * Copyright (c) 2010 Intel Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#ifndef PCH_DMA_H
+#define PCH_DMA_H
+
+#include <linux/dmaengine.h>
+
+enum pch_dma_width {
+ PCH_DMA_WIDTH_1_BYTE,
+ PCH_DMA_WIDTH_2_BYTES,
+ PCH_DMA_WIDTH_4_BYTES,
+};
+
+struct pch_dma_slave {
+ struct device *dma_dev;
+ unsigned int chan_id;
+ dma_addr_t tx_reg;
+ dma_addr_t rx_reg;
+ enum pch_dma_width width;
+};
+
+#endif